参数资料
型号: TLV5624IDR
厂商: TEXAS INSTRUMENTS INC
元件分类: DAC
英文描述: SERIAL INPUT LOADING, 3.5 us SETTLING TIME, 8-BIT DAC, PDSO8
封装: GREEN, PLASTIC, MS-012AA, SOIC-8
文件页数: 4/22页
文件大小: 571K
代理商: TLV5624IDR
TLV5624
2.7V TO 5.5V LOW POWER 8BIT DIGITALTOANALOG
CONVERTER WITH INTERNAL REFERENCE AND POWER DOWN
SLAS235B JULY 1999 REVISED APRIL 2004
12
WWW.TI.COM
APPLICATION INFORMATION
data format
The 16-bit data word for the TLV5624 consists of two parts:
D Program bits
(D15..D12)
D New data
(D11..D0)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
R1
SPD
PWR
R0
8 Data bits
0
SPD: Speed control bit
1
→ fast mode
0
→ slow mode
PWR: Power control bit
1
→ power down
0
→ normal operation
The following table lists the possible combination of the register select bits:
register select bits
R1
R0
REGISTER
0
Write data to DAC
0
1
Reserved
1
0
Reserved
1
Write data to control register
The meaning of the 12 data bits depends on the selected register. For the DAC register, bits D11...D4 determine
the new DAC output value:
data bits: DAC
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
New DAC Value
0
If the control register is selected, then D1, D0 of the 12 data bits are used to program the reference voltage:
data bits: CONTROL
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
X
REF1
REF2
X: don’t care
REF1 and REF0 determine the reference source and, if internal reference is selected, the reference voltage.
reference bits
REF1
REF0
REFERENCE
0
External
0
1
1.024 V
1
0
2.048 V
1
External
NOTE: A 0.1
F bypass capacitor must be installed on
the reference pin (pin 6). If internal reference is used a
10
F capacitor must also be installed for reference
voltage stability.
CAUTION:
If external reference voltage is applied to the REF pin, external reference MUST be selected.
相关PDF资料
PDF描述
TLV5624IDGKG4 SERIAL INPUT LOADING, 3.5 us SETTLING TIME, 8-BIT DAC, PDSO8
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