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参数资料
型号： TMR320R2812PGFQ
厂商： Texas Instruments, Inc.
元件分类： 数字信号处理
英文描述： TMS320R2811, TMS320R2812 Digital Signal Processors
中文描述： TMS320R2811，TMS320R2812数字信号处理器
文件页数： 85/147页
文件大小： 2021K
代理商： TMR320R2812PGFQ
Electrical Specifications
85
June 2004
SPRS257
6.2
Recommended Operating Conditions
MIN
NOM
MAX
UNIT
V
V
DDIO
Device supply voltage, I/O
3.14
1.71
1.81
3.3
1.8
1.9
3.47
1.89
V
DD
, V
DD1
Device supply voltage CPU
Device supply voltage, CPU
1.8 V (135 MHz)
1.9 V (150 MHz)
V
2
V
SS
V
DDA1
, V
DDA2
,
AV
DDREFBG
, V
DDAIO
Supply ground
0
V
ADC supply voltage
3.14
3.3
3.47
V
f
SYSCLKOUT
Device clock frequency
(system clock)
V
DD
= 1.9 V
±
5%
V
DD
= 1.8 V
±
5%
All inputs except XCLKIN
XCLKIN (@ 50
μ
A max)
All inputs except XCLKIN
XCLKIN (@ 50
μ
A max)
All I/Os except Group 2
Group 2
All I/Os except Group 2
Group 2
2
2
150
135
MHz
2
V
DDIO
V
DD
0.8
0.3V
DD
V
IH
High level input voltage
High-level input voltage
V
0.7V
DD
V
IL
Low level input voltage
Low-level input voltage
V
I
OH
High-level output source current,
High level output source current,
V
OH
= 2.4 V
4
8
mA
I
OL
Low-level output sink current,
Low level output sink current,
V
OL
= V
OL
MAX
4
8
mA
A bi
Ambient
temperature
A version
S version
§
Q version
40
40
40
85
125
125
°
C
T
A
°
C
See Section 6.7 for power sequencing of V
DDIO
, V
DDAIO
, V
DD
, V
DDA1,
V
DDA2, and
AV
DDREFBG
.
Group 2 pins are as follows: XINTF pins, PDPINTA, TDO, XCLKOUT, XF, EMU0, and EMU1.
§
Replaced by Q temperature option from silicon revision E onwards
6.3
Electrical Characteristics Over Recommended Operating Conditions
(Unless Otherwise Noted)
PARAMETER
TEST CONDITIONS
I
OH
= I
OH
MAX
I
OH
= 50
μ
A
MIN
2.4
TYP
MAX
UNIT
V
OH
High level output voltage
High-level output voltage
V
V
DDIO
0.2
V
OL
Low level output voltage
Low-level output voltage
I
OL
= I
OL
I
MAX
0 4
0.4
V
I
IL
Input
current
(low level)
With pullup
V
DDIO
= 3.3 V,
V 0 V
= 0 V
All I/Os
§
(including XRS)
except EVB
80
140
190
GPIOB/EVB
13
25
35
±
2
μ
A
With pulldown
V
DDIO
= 3.3 V, V
IN
= 0 V
Input
current
(hi h l
(high level)
With pullup
V
DDIO
= 3.3 V, V
IN
= V
DD
±
2
I
IH
With pulldown
V
DDIO
= 3.3 V,
V
IN
= V
DD
28
50
80
μ
A
I
OZ
Output current,
high-impedance state
(off-state)
V
O
= V
DDIO
or 0 V
±
2
μ
A
C
i
C
o
§
The following pins have no internal PU/PD: GPIOE0, GPIOE1, GPIOF0, GPIOF1, GPIOF2, GPIOF3, GPIOF12, GPIOG4, and GPIOG5.
The following pins have an internal pulldown: XMP/MC, TESTSEL, and TRST.
Input capacitance
Output capacitance
2
3
pF
pF
A
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