TMS320F243, TMS320F241
DSP CONTROLLERS
SPRS064B – DECEMBER 1997 – REVISED FEBRUARY 1999
100
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
10-bit dual analog-to-digital converter (ADC)
The 10-bit ADC has a separate power bus for its analog circuitry. These pins are referred to as V
CCA
and V
SSA
.
The power bus isolation is to enhance ADC performance by preventing digital switching noise of the logic
circuitry that can be present on V
SS
and V
CC
from coupling into the ADC analog stage. All ADC specifications
are given with respect to V
SSA
unless otherwise noted.
Resolution
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Monotonic
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output conversion mode
000h to 3FFh (000h for V
I
≤
V
SSA
; 3FFh for V
I
≥
V
CCA
)
. . . . . . . . . . . . . . . . . . . . . . .
Conversion time (including sample time)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10-bit (1024 values)
Assured
1 s
recommended operating conditions
MIN
NOM
MAX
UNIT
VCCA
VSSA
VREFHI
VREFLO
VAI
VREFHI and VREFLO must be stable, within
±
1/2 LSB of the required resolution, during the entire conversion time.
Analog supply voltage
4.5
5
5.5
V
Analog ground
Analog supply reference source
Analog ground reference source
0
V
VREFLO
VSSA
VSSA
VCCA
VREFHI
VCCA
V
V
Analog input voltage, ADCIN00–ADCIN07
V
ADC operating frequency
MIN
MAX
UNIT
ADC operating frequency
20
MHz