- 您现在的位置：买卖IC网 > PDF目录382623 > TMS320C6712GLS100 (Texas Instruments, Inc.) FIXED-POINT DIGITAL SIGNAL PROCESSOR PDF资料下载
参数资料
| 型号： | TMS320C6712GLS100 |
| 厂商： | Texas Instruments, Inc. |
| 元件分类： | 数字信号处理 |
| 英文描述： | FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| 中文描述： | 定点数字信号处理器 |
| 文件页数： | 29/70页 |
| 文件大小： | 1050K |
| 代理商： | TMS320C6712GLS100 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页当前第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页
TMS320C6205
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS106E
OCTOBER 1999
REVISED MARCH 2004
29
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
triggering, wake-up, and effects
The power-down modes and their wake-up methods are programmed by setting the PWRD field (bits 15
10)
of the control status register (CSR). The PWRD field of the CSR is shown in Figure 8 and described in Table 5.
When writing to the CSR, all bits of the PWRD field should be set at the same time. Logic 0 should be used when
“writing” to the reserved bit (bit 15) of the PWRD field. The CSR is discussed in detail in the
TMS320C6000 CPU
and Instruction Set Reference Guide
(literature number SPRU189).
31
16
15
14
13
12
11
10
9
8
Reserved
Enable or
Non-Enabled
Interrupt Wake
Enabled
Interrupt Wake
PD3
PD2
PD1
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
7
0
Legend:
R/W
x = Read/write reset value
NOTE: The shadowed bits are not part of the power-down logic discussion and therefore are not covered here. For information on these other
bit fields in the CSR register, see the
TMS320C6000 CPU and Instruction Set Reference Guide
(literature number SPRU189).
Figure 8. PWRD Field of the CSR Register
Power-down mode PD1 takes effect eight to nine clock cycles after the instruction that sets the PWRD bits in the
CSR.
If PD1 mode is terminated by a non-enabled interrupt, the program execution returns to the instruction where PD1
took effect. If PD1 mode is terminated by an enabled interrupt, the interrupt service routine will be executed first,
then the program execution returns to the instruction where PD1 took effect. The GIE bit in CSR and the NMIE
bit in the interrupt enable register (IER) must also be set in order for the interrupt service routine to execute;
otherwise, execution returns to the instruction where PD1 took effect upon PD1 mode termination by an enabled
interrupt.
PD2 and PD3 modes can only be aborted by device reset. Table 5 summarizes all the power-down modes.
相关PDF资料 |
PDF描述 |
|---|---|
| TMS320C6712GLW100 | FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| TMX320C6201GFN100 | FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| TMX320C6201GGP100 | FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| TMX320C6201GJC100 | FIXED-POINT DIGITAL SIGNAL PROCESSOR |
| TMX320C6201GJL100 | FIXED-POINT DIGITAL SIGNAL PROCESSOR |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TMS320C6713BGDP225 | 功能描述:数字信号处理器和控制器 - DSP, DSC Floating-Pt Dig Sig Processors RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| TMS320C6713BGDP300 | 功能描述:数字信号处理器和控制器 - DSP, DSC Floating-Pt Dig Sig Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 数据总线宽度:16 bit 程序存储器大小:16 KB 数据 RAM 大小:2 KB 最大时钟频率:40 MHz 可编程输入/输出端数量:35 定时器数量:3 设备每秒兆指令数:50 MIPs 工作电源电压:3.3 V 最大工作温度:+ 85 C 封装 / 箱体:TQFP-44 安装风格:SMD/SMT |
| TMS320C6713BGDPA200 | 制造商:Texas Instruments 功能描述:DSP FLOATING PT 32BIT 200MHZ 1600MIPS 272BGA - Trays |
| TMS320C6713BGDP-C20 | 制造商:Texas Instruments 功能描述: |
| TMS320C6713BPYP167 | 制造商:TI 功能描述:_ |
发布紧急采购，3分钟左右您将得到回复。