参数资料
型号: TMS320SP5410AGGU12
厂商: Texas Instruments, Inc.
元件分类: 数字信号处理
英文描述: Fixed-Point Digital Signal Processor
中文描述: 定点数字信号处理器
文件页数: 27/100页
文件大小: 913K
代理商: TMS320SP5410AGGU12
www.ti.com
3.3.2
HPI Nonmultiplexed Mode
HPID[15:0]
HAS
HDS1, HDS2, HCS
DMA
I
M
PPD[15:0]
DATA[15:0]
Address[16:0]
R/W
Data Strobes
READY
HPI16
HRDY
54xx
CPU
V
CC
HCNTL0
HCNTL1
HBIL
HR/W
HINT
HOST
TMS320VC5410A
Fixed-Point Digital Signal Processor
SPRS139G–NOVEMBER 2000–REVISED JANUARY 2005
The HPI16 is an enhanced 16-bit version of the TMS320C54x DSP 8-bit host-port interface (HPI8). The
HPI16 is designed to allow a 16-bit host to access the DSP on-chip memory, with the host acting as the
master of the interface. Some of the features of the HPI16 include:
16-bit bidirectional data bus
Multiple data strobes and control signals to allow glueless interfacing to a variety of hosts
Only nonmultiplexed address/data modes are supported
17-bit address bus used in nonmultiplexed mode to allow access to all internal memory (including
internal extended address pages)
HRDY signal to hold off host accesses due to DMA latency
The HPI16 acts as a slave to a 16-bit host processor and allows access to the on-chip memory of the
DSP.
NOTE
Only the nonmultiplexed mode is supported when the 5410A HPI is configured as a
HPI16 (see Figure 3-8).
The 5410A HPI functions as a slave and enables the host processor to access the on-chip memory. A
major enhancement to the 5410A HPI over previous versions is that it allows host access to the entire
on-chip memory range of the DSP. The host and the DSP both have access to the on-chip RAM at all
times and host accesses are always synchronized to the DSP clock. If the host and the DSP contend for
access to the same location, the host has priority, and the DSP waits for one cycle. Note that since host
accesses are always synchronized to the 5410A clock, an active input clock (CLKIN) is required for HPI
accesses during IDLE states, and host accesses are not allowed while the 5410A reset pin is asserted.
In
nonmultiplexed
mode, a host with separate address/data buses can access the HPI16 data register
(HPID) via the HD 16-bit bidirectional data bus, and the address register (HPIA) via the 17-bit HA address
bus. The host initiates the access with the strobe signals (HDS1, HDS2, HCS) and controls the direction of
the access with the HR/W signal. The HPI16 can stall host accesses via the HRDY signal. Note that the
HPIC register is not available in
nonmultiplexed
mode since there are no HCNTL signals available. All
host accesses initiate a DMA read or write access. Figure 3-8 shows a block diagram of the HPI16 in
nonmultiplexed
mode.
Figure 3-8. Host-Port Interface — Nonmultiplexed Mode
Functional Overview
27
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