参数资料
型号: TPA5050RSAT
厂商: TEXAS INSTRUMENTS INC
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC16
封装: 4 X 4 MM, GREEN, PLASTIC, QFN-16
文件页数: 21/21页
文件大小: 784K
代理商: TPA5050RSAT
www.ti.com
A6
A5
A0 R/W ACK A7
A6
A5
A4
A0 ACK
A6
A5
A0
ACK
Start
Condition
Stop
Condition
Acknowledge
I2CDeviceAddressand
Read/WriteBit
Register
DataByte
D7
D6
D1
D0 ACK
I2CDeviceAddressand
Read/WriteBit
Not
Acknowledge
R/W
A1
RepeatStart
Condition
MULTIPLE-BYTE READ
A6
A0
ACK
Acknowledge
I2CDeviceAddressand
Read/WriteBit
R/W
A6
A0
R/W ACK
A0 ACK
D7
D0
ACK
Start
Condition
Stop
Condition
Acknowledge
LastDataByte
ACK
FirstDataByte
RepeatStart
Condition
Not
Acknowledge
I2CDeviceAddressand
Read/WriteBit
Register
OtherDataBytes
A7
A6
A5
D7
D0 ACK
Acknowledge
D7
D0
TPA5050 Operation
VDD
DATA
LRCLK
BCLK
GND
DATA_OUT
SDA
SCL
ADD0
ADD1
ADD2
GND
3.3V
0.1 F
m
Digital Audio
WordClock
BitClock
Delayed Audio
I CClock
2
I CData
2
I C Address
Select
2
SLOS492B – MAY 2006 – REVISED MAY 2007
Figure 8. Single-Byte Read Transfer
A multiple-byte data read transfer is identical to a single-byte data read transfer except that multiple data bytes
are transmitted by the TPA5050 to the master device as shown in Figure 9. With the exception of the last data
byte, the master device responds with an acknowledge bit after receiving each data byte.
Figure 9. Multiple-Byte Read Transfer
The following sections describe the registers configurable via I2C commands for the TPA5050.
Only a single decoupling capacitor (0.1
F–1 F) is required across VDD and GND. The ADDx terminals can be
directly connected to VDD or GND. Table 1 describes the I2C addresses selectable via the ADDx terminals. A
schematic implementation of the TPA5050 is shown in Figure 10.
Figure 10. TPA5050 Schematic
9
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