参数资料
型号: TPA6130A2RTJTG4
厂商: TEXAS INSTRUMENTS INC
元件分类: 音频控制
英文描述: 2 CHANNEL(S), VOLUME CONTROL CIRCUIT, PQCC20
封装: 4 X 4 MM, GREEN, PLASTIC, QFN-20
文件页数: 8/28页
文件大小: 1198K
代理商: TPA6130A2RTJTG4
www.ti.com
A6
A5
A4
A3
A2
A1
A0
R/W ACK A7
A6
A5
A4
A3
A2
A1
A0 ACK
D7
D6
D5
D4
D3
D2
D1
D0
ACK
Start
Condition
Stop
Condition
Acknowledge
I2CDeviceAddressand
Read/WriteBit
Register
DataByte
MULTIPLE-BYTE WRITE AND INCREMENTAL MULTIPLE-BYTE WRITE
Register
SINGLE-BYTE READ
A6
A5
A0 R/W ACK A7
A6
A5
A4
A0 ACK
A6
A5
A0
ACK
Start
Condition
Stop
Condition
Acknowledge
I2CDeviceAddressand
Read/WriteBit
Register
DataByte
D7
D6
D1
D0 ACK
I2CDeviceAddressand
Read/WriteBit
Not
Acknowledge
R/W
A1
RepeatStart
Condition
MULTIPLE-BYTE READ
SLOS488B – NOVEMBER 2006 – REVISED FEBRUARY 2008
Figure 38. Single-Byte Write Transfer
A multiple-byte data write transfer is identical to a single-byte data write transfer except that multiple data bytes
are transmitted by the master device to the TPA6130A2 as shown in Figure 39. After receiving each data byte,
the TPA6130A2 responds with an acknowledge bit.
Figure 39. Multiple-Byte Write Transfer
As shown in Figure 40, a single-byte data read transfer begins with the master device transmitting a start
condition followed by the I2C device address and the read/write bit. For the data read transfer, both a write
followed by a read are actually done. Initially, a write is done to transfer the address byte of the internal memory
address to be read. As a result, the read/write bit is set to a 0.
After receiving the TPA6130A2 address and the read/write bit, the TPA6130A2 responds with an acknowledge
bit. The master then sends the internal memory address byte, after which the TPA6130A2 issues an
acknowledge bit. The master device transmits another start condition followed by the TPA6130A2 address and
the read/write bit again. This time the read/write bit is set to 1, indicating a read transfer. Next, the TPA6130A2
transmits the data byte from the memory address being read. After receiving the data byte, the master device
transmits a not-acknowledge followed by a stop condition to complete the single-byte data read transfer.
Figure 40. Single-Byte Read Transfer
A multiple-byte data read transfer is identical to a single-byte data read transfer except that multiple data bytes
are transmitted by the TPA6130A2 to the master device as shown in Figure 41. With the exception of the last
data byte, the master device responds with an acknowledge bit after receiving each data byte.
16
Copyright 2006–2008, Texas Instruments Incorporated
Product Folder Link(s): TPA6130A2
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