参数资料
型号: TPA6205A1DRBRG4
厂商: TEXAS INSTRUMENTS INC
元件分类: 音频/视频放大
英文描述: 1.25 W, 1 CHANNEL, AUDIO AMPLIFIER, PDSO8
封装: 3 X 3 MM, GREEN, PLASTIC, SON-8
文件页数: 27/28页
文件大小: 912K
代理商: TPA6205A1DRBRG4
f - Frequency - Hz
0
-50
-100
0
200 400 600 800 1k 1.2k
-Output
V
oltage
-
dBV
1.4k 1.6k 1.8k 2k
-150
-100
0
-50
V
O
-Supply
V
oltage
-
dBV
V
DD
VDD Shown in Figure 19
CI = 2 F,
C(Bypass) = 0.47 F,
Inputs ac-Grounded
Gain = 1V/V
C1
Frequency
217.41 Hz
C1 - Duty
20 %
C1 High
3.598 V
C1 Pk-Pk
504 mV
V
oltage
-
V
Ch1 100 mV/div
Ch4 10 mV/div
2 ms/div
t - Time - ms
VDD
VO
-100
0
-90
-80
-70
-60
-50
-40
-30
-20
-10
20
20 k
50 100 200
500 1 k 2 k
5 k 10 k
f - Frequency - Hz
CMRR
-
Common
Mode
Rejection
Ratio
-
dB
VDD = 2.5 V to 5 V
VIC = 200 mVp-p
RL = 8
Gain = 1 V/V
-70
-60
-50
-40
-30
-20
-10
0
10
20
30
40
10
100
10 k
100 k 1 M
10 M
-220
-180
-140
-100
-60
-20
20
60
100
140
180
220
1 k
f - Frequency - Hz
Gain
-
dB
Phase
-
Degrees
Gain
Phase
VDD = 3.6 V
RL = 8
Gain = 1 V/V
-200
-150
-100
-50
0
50
100
150
200
100
1 k
10 k
100 k
1 M
-200
-150
-100
-50
0
50
100
150
200
f - Frequency - Hz
Gain
-
dB
Phase
-
Degrees
Gain
Phase
VDD = 3.6 V
RL = 8
10 M
-100
-90
-80
-70
-60
-50
-40
-30
-20
-10
0
0.5 1
1.5 2
2.5 3
3.5 4
4.5 5
RL = 8
Gain = 1 V/V
VIC - Common Mode Input Voltage - V
CMRR
-
Common
Mode
Rejection
Ratio
-
dB
VDD = 3.6 V
VDD = 5 V
VDD = 2.5 V
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
0 0.5 1
1.5 2 2.5
3 3.5
4 4.5 5
5.5
VDD - Supply Voltage - V
-Supply
Current
-
mA
I DD
0
1
2
3
4
5
6
0
0.5
1
1.5
2
C(Bypass) - Bypass Capacitor - F
Start-Up
Time
-
ms
(1) Start-Up time is the time it takes (from a
low-to-high transition on SHUTDOWN) for the
gain of the amplifier to reach -3 dB of the final
gain.
SLOS490B – JULY 2006 – REVISED JUNE 2008 ..............................................................................................................................................................
www.ti.com
TYPICAL CHARACTERISTICS (continued)
GSM POWER SUPPLY
REJECTION
COMMON MODE REJECTION RATIO
vs
TIME
FREQUENCY
Figure 19.
Figure 20.
Figure 21.
COMMON MODE REJECTION RATIO
CLOSED LOOP GAIN/PHASE
OPEN LOOP GAIN/PHASE
vs
COMMON MODE INPUT VOLTAGE
FREQUENCY
Figure 22.
Figure 23.
Figure 24.
SUPPLY CURRENT
START-UP TIME(1)
vs
SUPPLY VOLTAGE
BYPASS CAPACITOR
Figure 25.
Figure 26.
8
Copyright 2006–2008, Texas Instruments Incorporated
Product Folder Link(s): TPA6205A1
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