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参数资料
| 型号： | TPS22949DRGR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, DSO8 |
| 封装： | 3 X 3 MM, SON-8 |
| 文件页数： | 9/22页 |
| 文件大小： | 688K |
| 代理商： | TPS22949DRGR |
APPLICATION INFORMATION
Under-Voltage Lockout
Fault Reporting
Current Limiting
Input Voltage
Input/Output Capacitors
www.ti.com ......................................................................................................................................... SLVS908A – FEBRUARY 2009 – REVISED FEBRUARY 2009
The under-voltage lockout turns off the switch if the input voltage drops below the under-voltage lockout
threshold. With the ON pin active the input voltage rising above the under-voltage lockout threshold will cause a
controlled turn-on of the switch which limits current over-shoots. The TPS22949 as well have a UVLO on the V+
bias voltage and will keep the output of the LDO shut off until the internal circuitry is operating properly.
When an overcurrent, input undervoltage, or overtemperature condition is detected, OC is set active low to signal
the fault mode. OC is an open-drain MOSFET and requires a pullup resistor between VIN and OC. During
shutdown, the pulldown on OC is disabled, reducing current draw from the supply.
When the switch current reaches the maximum limit, the TPS22949 operates in a constant-current mode to
prohibit excessive currents from causing damage. TPS22949 has a minimum current limit of 100 mA.
The input voltage (VIN) of the current limiter is set from 1.62 V to 4.5 V, however if both the current limiter and
the LDO are enabled, the user must be careful to have the input voltage (VIN) greater than 1.8 V + (voltage drop
through the switch) + (voltage drop through the LDO), otherwise the LDO will not have a high enough internal
input signal to operate properly.
Although an input capacitor is not required for stability of on the input pin (VIN), it is good analog design practice
to connect a 0.1
F to 1 F low equivalent series resistance (ESR) capacitor across the IN pin input supply near
the regulator. This capacitor counteracts reactive input sources and improves transient response, noise rejection,
and ripple rejection. A higher value capacitor may be necessary if large, fast rise time load transients are
anticipated, or if the device is located close to the power source. If source impedance is not sufficiently low, a
0.1-
F input capacitor may be necessary to ensure stability. The V
+ bias pin does not require an input capacitor
because it does not source high currents. However, if source impedance is not sufficiently low, a small 0.1-
F
bypass capacitor is recommended.
A 0.1-
F capacitor CCL, should be placed between V
OUTCL and GND. This capacitor will prevent parasitic board
inductances from forcing VOUTCL below GND when the switch turns-off. For the TPS22949, the total output
capacitance needs to be kept below a maximum value, CCL(max), to prevent the part from registering an
over-current condition and turning-off the switch. The maximum output capacitance can be determined from the
following formula:
CCL = ILIM(MAX) × tBLANK(MIN) ÷ VIN
Due to the integral body diode in the PMOS switch, a CIN greater than CCL is highly recommended. A CCL greater
than CIN can cause VOUTCL to exceed VIN when the system supply is removed. This could result in current flow
through the body diode from VOUTCL to VIN.
On TPS22949, a storage cap (CCL) at the output of the current limiter is recommended to provide enough current
to the LDO during the start-up sequence. The storage capacitor is needed in order to reduce the amount of
inrush current supplied through the current limited load switch to the LDO during the power up sequence (see
Figure 42. With too small of CCL capacitor, the inrush current needed to start the LDO and charge CLDO could be
interpreted by the current limiter as an over-current and therefore trigger the current limiting feature of the switch.
The switch will then try to limit the current to the 100 mA limit and the user will see an undesired drop on the
supply line (see Figure 43).
The TPS22949 LDO (VOUTLDO) is designed to be stable with standard ceramic capacitors with values of 2.2 F or
larger at the output. X5R- and X7R-type capacitors are best because they have minimal variation in value and
ESR over temperature. Maximum ESR should be less than 250 m
illustrate the behavior of the TPS22949 and TPS22949A with a 100-mA sinking load and different capacitor
values for a typical application where both enables are tied to the same input voltage (see Figure 41).
Copyright 2009, Texas Instruments Incorporated
17
Product Folder Link(s): TPS22949
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