RECOMMENDED OPERATING RANGE
TPS2410 REGULATION-LOOP STABILITY
SLVS727C – NOVEMBER 2006 – REVISED JUNE 2009 .................................................................................................................................................. www.ti.com
The maximum recommended bus voltage is lower than the absolute maximum voltage ratings on A, C, and VDD
solely to provide margin for transients on the bus. Most power systems experience transient voltages above the
normal operating level. Short transients, or voltage spikes, may be clamped by the ORing MOSFET to an output
capacitor and/or voltage rail depending on the system design. Transient protection, e.g. a TVS diode (transient
voltage suppressor, a type of Zener diode), may be required on the input or output if the system design does not
inherently limit transient voltages below the TPS2410/11 absolute maximum ratings. If a TVS is required, it must
protect to the absolute maximum ratings at the worst case clamping current. The TPS2410/11 will operate
properly up to the absolute maximum voltage ratings on A, C, and VDD.
The TPS2410 uses an internal linear error amplifier to keep the external MOSFET from saturating at light load.
This feature has the benefits of setting a turn-off above 0 V, providing a soft turn-off for slowly decaying input
voltages, and helps droop-sharing redundancy at light load.
Although the control loop has been designed to accommodate a wide range of applications, there are a few
guidelines to be followed to assure stability.
Select a MOSFET C
(ISS) of 1 nF or greater
Use low ESR bulk capacitors on the output C terminal, typically greater than 100 F with less than 50 m
ESR
Maintain some minimum operational load (e.g. 100 mA or more)
Symptoms of stability issues include V(AC) undershoot and possible fast turn-off on large-transient recovery, and
a worst-case situation where the gate continually cycles on and off. These conditions are solved by following the
rules above. Loop stability should not be confused with tripping the fast comparator due to V(AC) tripping the gate
off.
Although not common, a condition may arise where the dc/dc converter transient response may cause the GATE
to cycle on and off at light load. The converter experiences a load spike when GATE transitions from OFF to ON
because the ORed bus capacitor voltage charges abruptly by as much as a diode drop. The load spike may
cause the supply output to droop and overshoot, which can result in the ORed capacitor peak charging to the
overshoot voltage. When the supply output settles to its regulated value, the ORed bus may be higher than the
source, causing the TPS2410/11 to turn the GATE off. While this may not actually cause a problem, its
occurrence may be mitigated by control of the power supply transient characteristic and increasing its output
capacitance while increasing the ORed load to capacitance ratio. Adjusting the TPS2410 turn-off threshold or
using STAT if possible to desensitize the redundant ORing device may help as well. Careful attention to layout
and charge-pump noise around the TPS2410/11 helps with noise margin.
The linear gate driver has a pull-up current of 290
A and pull-down current of 3 mA typical.
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