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参数资料
| 型号： | TPS24711 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PDSO10 |
| 封装： | GREEN, PLASTIC, MSOP-10 |
| 文件页数： | 33/34页 |
| 文件大小： | 2148K |
| 代理商： | TPS24711 |
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LIM
PROG
SENSE
3125
P
R
=
SLVSAL2C
– JANUARY 2011 – REVISED MAY 2011
– VVCC drops below the UVLO threshold
2. GATE is pulled down by a 1 A current source for 13.5
s when a hard output short circuit occurs and
V(VCC – SENSE) is greater than 60 mV, i.e., the fast-trip shutdown threshold. After fast-trip shutdown is
complete, an 11-mA sustaining current ensures that the external MOSFET remains off.
3. GATE is discharged by a 20 k
resistor to GND if the chip die temperature exceeds the OTSD rising
threshold.
GATE remains low in latch mode (TPS24710/12) and attempts a restart periodically in retry mode
(TPS24711/13).
If used, any capacitor connecting GATE and GND should not exceed 1
μF and it should be connected in series
with a resistor of no less than 1 k
. No external resistor should be directly connected from GATE to GND or from
GATE to OUT.
GND: This pin is connected to system ground.
OUT: This pin allows the controller to measure the drain-to-source voltage across the external MOSFET M1. The
power-good indicator (PG/PGb) relies on this information, as does the power limiting engine. The OUT pin should
be protected from negative voltage transients by a clamping diode or sufficient capacitors. A Schottky diode of
3 A / 40 V in a SMC package is recommended as a clamping diode for high-power applications. The OUT pin
should be bypassed to GND with a low-impedance ceramic capacitor in the range of 10 nF to 1
μF.
PG: PG is assigned for TPS24712/13. This active-high, open-drain output is intended to interface to downstream
dc/dc converters or monitoring circuits. PG assumes high-impedance after the drain-to-source voltage of the FET
has fallen below 170 mV and a 3.4-ms deglitch delay has elapsed. It pulls low when VDS exceeds 240 mV. PG
assumes low-impedance status after a 3.4-ms deglitch delay once VDS of M1 rises up, resulting from GATE being
pulled to GND at any of the following conditions:
An overload current fault occurs (VSENSE > 25 mV).
A hard output short circuit occurs, leading to V(VCC – SENSE) greater than 60 mV, i.e., the fast-trip shutdown
threshold has been exceeded.
VEN is below its falling threshold.
VVCC drops below the UVLO threshold.
Die temperature exceeds the OTSD threshold.
This pin can be left floating when not used.
PGb: PGb is assigned for TPS24710/11. This active-low, open-drain output is intended to interface to
downstream dc/dc converters or monitoring circuits. PGb pulls low after the drain-to-source voltage of the FET
has fallen below 170 mV and a 3.4-ms deglitch delay has elapsed. It goes open-drain when VDS exceeds 240
mV. PGb assumes high-impedance status after a 3.4-ms deglitch delay once VDS of M1 rises up, resulting from
GATE being pulled to GND at any of the following conditions:
An overload current fault occurs (VSENSE > 25 mV).
A hard output short circuit occurs, leading to V(VCC – SENSE) greater than 60 mV, i.e., the fast-trip shutdown
threshold has been exceeded.
VEN is below its falling threshold.
VVCC drops below the UVLO threshold.
Die temperature exceeds the OTSD threshold.
This pin can be left floating when not used.
PROG: A resistor from this pin to GND sets the maximum power permitted in the external MOSFET M1 during
inrush. Do not apply a voltage to this pin. If the constant power limit is not desired, use a PROG resistor of
4.99 k
. To set the maximum power, use Equation 1,
(1)
where PLIM is the allowed power limit of MOSFET M1. RSENSE is the load-current-monitoring resistor connected
between the VCC pin and the SENSE pin. RPROG is the resistor connected from the PROG pin to GND. Both
RPROG and RSENSE are in ohms and PLIM is in watts. PLIM is determined by the maximum allowed thermal stress of
8
Copyright
2011, Texas Instruments Incorporated
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