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参数资料
| 型号： | TPS3619-50MDGK |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封装： | PLASTIC, MSOP-8 |
| 文件页数： | 13/18页 |
| 文件大小： | 451K |
| 代理商： | TPS3619-50MDGK |
SGLS350C – JULY 2006 – REVISED SEPTEMBER 2010
www.ti.com
Electrical Characteristics
over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VDD = 3.3 V, IOH = –2 mA
VDD – 0.4
RESET
VDD = 5 V, IOH = –3 mA
VDD – 0.4
VOH
High-level output voltage
VDD = 1.8 V, IOH = –20 mA
VDD – 0.3
V
PFO
VDD = 3.3 V, IOH = –80 mA
VDD – 0.4
VDD = 5 V, IOH = –120 mA
VDD – 0.4
VDD = 1.8 V, IOL = –400 mA
0.2
VOL
Low-level output voltage
RESET, PFO
VDD = 3.3 V, IOL = 2 mA
0.4
V
VDD = 5 V, IOL = 3 mA
0.4
IOL = 20 mA, VBAT > 1.1 V or
Vres
Power-up reset voltage(1)
0.4
V
VDD > 1.1 V
IOUT = 8.5 mA, VBAT = 0 V,
VDD – 50
VDD = 1.8 V
IOUT = 125 mA, VBAT = 0 V,
Normal mode
VDD – 150
VDD = 3.3 V
VOUT
IOUT = 190 mA, VBAT = 0 V,
mV
VDD – 200
VDD = 5 V
IOUT = 0.5 mA, VBAT = 1.5 V,
VBAT – 50
VDD = 0 V
Battery-backup mode
IOUT = 7.5 mA, VBAT = 3.3 V
VBAT – 150
VDD to VOUT on resistance
VDD = 5 V
0.6
1
rDS(on)
VBAT to VOUT on resistance
VDD = 3.3 V
8
20
TPS36XX-33
2.88
2.93
3.05
VIT–
TA = –55°C to 125°C
V
Negative-going input threshold
TPS36XX-50
4.46
4.55
4.64
voltage(2)
VPFI
TA = –55°C to 125°C
1.13
1.15
1.185
V
1.65 V < VIT < 2.5 V
20
VIT
2.5 V < VIT < 3.5 V
40
Vhys
Hysteresis
3.5 V < VIT < 5.5 V
60
mV
PFI
12
VBSW(3)
VDD = 1.8 V
55
IIH
High-level input current
MR
MR = 0.7 × VDD,
VDD = 5 V
–30
–76
mA
IIL
Low-level input current
MR
MR = 0 V,
VDD = 5 V
–110
–255
mA
II
Input current
PFI
–25
25
nA
VDD = 1.8 V
–0.3
IOS
Short-circuit current
PFO
PFO = 0 V
VDD = 3.3 V
–1.1
mA
VDD = 5 V
–2.4
VOUT = VDD
40
IDD
VDD supply current
mA
VOUT = VBAT
40
VOUT = VDD
–0.1
0.1
I(BAT)
VBAT supply current
mA
VOUT = VBAT
0.5
CI
Input capacitance
VI = 0 V to 5 V
5
pF
(1)
The lowest supply voltage at which RESET becomes active. tr,VDD ≥ 15 ms/V.
(2)
To ensure the best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 mF) should be placed near the supply terminals.
(3)
For VDD < 1.6 V, VOUT switches to VBAT, regardless of VBAT.
4
Copyright 2006–2010, Texas Instruments Incorporated
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