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| 型号： | TPS40021PWP |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | 0.01 A SWITCHING CONTROLLER, 1100 kHz SWITCHING FREQ-MAX, PDSO16 |
| 封装： | GREEN, PLASTIC, HTSSOP-16 |
| 文件页数： | 8/36页 |
| 文件大小： | 724K |
| 代理商： | TPS40021PWP |
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TPS40020
TPS40021
SLUS535D MARCH 2003 REVISED JULY 2007
www.ti.com
16
APPLICATION INFORMATION
UDG03181
VOUT 1%
1.5
s
VOUT
4
s
VDD
0.3 V
0.6 V
500 ns
Transient Comparators Disabled
Transient Comparators Enabled
SS/SD
PWRGD
1.3 V
Figure 8. Transient Comparator Waveforms
Layout Considerations
Successful operation of the TPS4002x family of controllers is dependent upon the proper converter layout and
grounding techniques. High current returns for the SR MOSFET’s source, input capacitance, output
capacitance, PVDD capacitance, and input bypass capacitors (if applicable), should be kept on a single ground
plane or wide trace connected to the PGND (pin10) through a short wide trace. Control components connected
to signal ground, as well as the PowerPad thermal pad, should be connected to a single ground plane connected
to SGND (Pin 8) through a short trace. SGND and PGND should be connected at a single point using a narrow
trace.
Proper operation of Predictive Gate Drive
technology and IZERO functions are dependent upon detecting
low-voltage thresholds on the SW node. To ensure that the signal at the SW pin accurately represents the
voltage at the main switching node, the connection from SW (pin 14) to the main switching node of the converter
should be kept as short and wide as possible and should ideally be kept on the top level with the power
components. If the SW trace must traverse multiple board layers between the TPS4002x and the main
switching node, multiple vias should be used to minimize the trace impedance.
Gate drive outputs, LDRV and HDRV (pins 11 and 15, respectively) should be kept as short as possible to
minimize inductances in the traces. If the gate drive outputs need to traverse multiple board layers multiple vias
should be used.
Charge pump components, BOOT1, BOOT2, PVDD, and any input bypass capacitors (if required), should be
kept as close as possible to their respective pins. Ceramic bypass capacitors should be used if the input
capacitors are located more than a couple of inches away from the TPS4002X. If a bypass capacitor is not
needed the trace from the input capacitors to VDD (pin2) should be kept as short and wide as possible to
minimize trace impedance. If multiple board layers are traversed multiple vias should be used.
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相关代理商/技术参数 |
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| TPS40021PWPG4 | 功能描述:DC/DC 开关控制器 Low Input Sync Buck Cntrlr source/sink RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| TPS40021PWPR | 功能描述:DC/DC 开关控制器 Low Input Sync Buck Cntrlr source/sink RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| TPS40021PWPRG4 | 功能描述:DC/DC 开关控制器 Low Input Sync Buck Cntrlr source/sink RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
| TPS40022PWP | 制造商:Texas Instruments 功能描述: |
| TPS40040 | 制造商:TI 制造商全称:Texas Instruments 功能描述:LOW PIN COUNT, LOW VIN (2.5 V TO 5.5 V) SYNCHRONOUS BUCK DC-TO-DC CONTROLLER WITH ENABLE |
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