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参数资料
| 型号： | TPS40190DRCRG4 |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | SWITCHING CONTROLLER, 360 kHz SWITCHING FREQ-MAX, PDSO10 |
| 封装： | 3 X 3 MM, GREEN, PLASTIC, SON-10 |
| 文件页数： | 19/25页 |
| 文件大小： | 615K |
| 代理商： | TPS40190DRCRG4 |
www.ti.com
ELECTRICAL CHARACTERISTICS
SLUS658B – JULY 2005 – REVISED AUGUST 2007
TA = –40°C to 85°C, VVDD= 12 Vdc, TA =TJ, all parameters at zero power dissipation (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
REFERENCE
0
°C ≤ T
J ≤ 85°C
585
591
597
VFB
Feedback voltage range
mV
-40
°C ≤ T
J ≤ 85°C
582
591
597
INPUT SUPPLY
VVDD
Input voltage range
4.5
15.0
V
VENABLE = 2.5 V, Outputs switching
2.5
mA
IVDD
Operating current
VENABLE = 0.6 V
20
A
ON BOARD REGULATOR
V5VBP
Output voltage
VVDD > 6 V, I5VBP ≤ 10 mA
5.1
5.3
5.5
V
VDO
Regulator dropout voltage
VVDD - VBP5 , VVDD = 5 V, IBP5 ≤ 25 mA
270
400
mV
ISC
Regulator current limit threshold
40
mA
IBP5
Average current(1)
40
OSCILLATOR
fSW
Switching frequency
240
300
360
kHz
VRMP
Ramp amplitude(2)
0.75
V
VVALLEY
Valley voltage(2)
0.5
PWM
DMAX
Maximum duty cycle(2)
85%
tON(min)
Minimum controlled pulse(2)
130
HDRV off to LDRV on
50
ns
tDEAD
Output driver dead time
LDRV off to HDRV on
25
SOFT-START
tSS
Soft-start time
3.0
4.7
7.0
tSSDLY
Soft-start delay time(3)
6
ms
tREG
Time to regulation
10.5
ERROR AMPLIFIER
GBWP
Gain bandwidth product(2)
5
MHz
AOL
DC gain(2)
60
dB
IIB
Input bias current (current out of FB pin)
100
0
nA
IEAOP
Output source current
VFB = 0 V
1
mA
IEAOM
Output sink current
VFB = 2 V
1
SHORT CIRCUIT PROTECTION
tPSS(min)
Minimum pulse during short circuit(2)
250
ns
tBLNK
Blanking time(2)
100
140
180
tOFF
Off-time between restart attempts
25
95
ms
RCOMP(GND) = OPEN, TJ = 25°C
256
320
384
VILIM
Short circuit comparator threshold voltage
RCOMP(GND) = 4 k, TJ = 25°C
128
160
192
mV
RCOMP(GND) = 12 k, TJ = 25°C
368
460
552
(1)
40 mA is the current available for MOSFET gate drive, the device itself and any external loads. The sum of these must not exceed
40 mA.
(2)
Ensured by design. Not production tested.
(3)
The delay time is the time delay from application of power to the device or from assertion of ENABLE until the output begins to rise.
Copyright 2005–2007, Texas Instruments Incorporated
3
Product Folder Link(s): TPS40190
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