参数资料
型号: TPS54160ADRCR
厂商: Texas Instruments
文件页数: 18/55页
文件大小: 0K
描述: IC REG BUCK ADJ 1.5A 10SON
标准包装: 3,000
系列: SWIFT™, Eco-Mode™
类型: 降压(降压)
输出类型: 可调式
输出数: 1
输出电压: 0.8 V ~ 58 V
输入电压: 3.5 V ~ 60 V
PWM 型: 电流模式
频率 - 开关: 100kHz ~ 2.5MHz
电流 - 输出: 1.5A
同步整流器:
工作温度: -40°C ~ 150°C
安装类型: 表面贴装
封装/外壳: 10-VFDFN 裸露焊盘
包装: 带卷 (TR)
供应商设备封装: 10-SON 裸露焊盘(3x3)
SLVSB56C – MAY 2012 – REVISED FEBRUARY 2014
Feature Description (continued)
8.3.10 Slow Start and Tracking Pin (SS/TR)
The TPS54160A effectively uses the lower voltage of the internal voltage reference or the SS/TR pin voltage as
the power-supply's reference voltage and regulates the output accordingly. A capacitor on the SS/TR pin to
ground implements a slow start time. The TPS54160A has an internal pull-up current source of 2 μ A that charges
the external slow start capacitor. The calculations for the slow start time (10% to 90%) are shown in Equation 6 .
The voltage reference (V REF ) is 0.8 V and the slow start current (I SS ) is 2 μ A. The slow start capacitor should
remain lower than 0.47 μ F and greater than 0.47 nF.
C SS ( ) =
V REF ( ) ′ 0.8
nF
t SS ( ms ) ′ I SS ( m A )
V
(6)
At power up, the TPS54160A does not start switching until the slow start pin is discharged to less than 40 mV to
ensure a proper power up, see Figure 31 .
Also, during normal operation, the TPS54160A stops switching and the SS/TR must be discharged to 40 mV
when the voltage at the VIN pin is below the VIN UVLO, EN pin pulled below 1.25 V, or a thermal shutdown
event occurs.
The VSENSE voltage follows the SS/TR pin voltage with a 45 mV offset up to 85% of the internal voltage
reference. When the SS/TR voltage is greater than 85% on the internal reference voltage the offset increases as
the effective system reference transitions from the SS/TR voltage to the internal voltage reference (see
Figure 23 ). The SS/TR voltage ramps linearly until clamped at 1.7 V.
EN
SS/TR
V SENSE
VOUT
Figure 31. Operation of SS/TR Pin when Starting
8.3.11 Overload Recovery Circuit
The TPS54160A has an overload recovery (OLR) circuit. The OLR circuit slow starts the output from the
overload voltage to the nominal regulation voltage once the fault condition is removed. The OLR circuit
discharges the SS/TR pin to a voltage slightly greater than the VSENSE pin voltage using an internal pull down
of 100 μ A when the error amplifier is changed to a high voltage from a fault condition. When the fault condition is
removed, the output slow-starts from the fault voltage to nominal output voltage.
18
Copyright ? 2012–2014, Texas Instruments Incorporated
Product Folder Links: TPS54160 TPS54160A
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