参数资料
| 型号： | TPS54160ADRCR |
| 厂商： | Texas Instruments |
| 文件页数： | 21/55页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK ADJ 1.5A 10SON |
| 标准包装： | 3,000 |
| 系列： | SWIFT™, Eco-Mode™ |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.8 V ~ 58 V |
| 输入电压： | 3.5 V ~ 60 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 100kHz ~ 2.5MHz |
| 电流 - 输出： | 1.5A |
| 同步整流器： | 无 |
| 工作温度： | -40°C ~ 150°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-VFDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 10-SON 裸露焊盘（3x3） |
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Feature Description (continued)
TPS54160A
EN
SS/TR
PWRGD
TPS54160A
EN
SLVSB56C – MAY 2012 – REVISED FEBRUARY 2014
VOUT 1
VOUT 2
R1
SS/ TR
R2
PWRGD
R3
R4
Figure 36. Schematic for Ratiometric and Simultaneous Start-Up Sequence
Ratio-metric and simultaneous power supply sequencing can be implemented by connecting the resistor network
of R1 and R2 shown in Figure 36 to the output of the power supply that needs to be tracked or another voltage
reference source. Using Equation 7 and Equation 8 , the tracking resistors can be calculated to initiate the V OUT2
slightly before, after or at the same time as V OUT1 . Equation 9 is the voltage difference between V OUT1 and V OUT2
at the 95% of nominal output regulation.
The Δ V variable is zero volts for simultaneous sequencing. To minimize the effect of the inherent SS/TR to
VSENSE offset (V SS(offset) ) in the slow start circuit and the offset created by the pull-up current source (I SS ) and
tracking resistors, the V SS(offset) and I SS are included as variables in the equations.
To design a ratio-metric start up in which the V OUT2 voltage is slightly greater than the V OUT1 voltage when V OUT2
reaches regulation, use a negative number in Equation 7 through Equation 9 for Δ V. Equation 9 results in a
positive number for applications which the V OUT2 is slightly lower than V OUT1 when V OUT2 regulation is achieved.
Since the SS/TR pin must be pulled below 40 mV before starting after an EN, UVLO or thermal shutdown fault,
careful selection of the tracking resistors is needed to ensure the device restarts after a fault. Make sure the
calculated R1 value from Equation 7 is greater than the value calculated in Equation 10 to ensure the device can
recover from a fault.
As the SS/TR voltage becomes more than 85% of the nominal reference voltage the V SS(offset) becomes larger as
the slow start circuits gradually handoff the regulation reference to the internal voltage reference. The SS/TR pin
voltage needs to be greater than 1.3 V for a complete handoff to the internal voltage reference as shown in
V REF SS
R1= +
V OUT2 + D V V SS ( offset )
I
(7)
R2 =
V REF ′ R1
V OUT2 + D V - V REF
(8)
D V = V OUT1 - V OUT2
(9)
Copyright ? 2012–2014, Texas Instruments Incorporated
Product Folder Links: TPS54160 TPS54160A
21
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