参数资料
型号: TPS54900PWG4
厂商: Texas Instruments
文件页数: 8/16页
文件大小: 0K
描述: IC REG BUCK ADJ .1A QUAD 16TSSOP
标准包装: 90
类型: 降压(降压)
输出类型: 可调式
输出数: 4
输出电压: 7.5 V ~ 13.1 V
输入电压: 15V
PWM 型: 电压模式
频率 - 开关: 450kHz
电流 - 输出: 100mA
同步整流器:
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 16-TSSOP(0.173",4.40mm 宽)
包装: 管件
供应商设备封装: 16-TSSOP
配用: 296-17304-ND - EVAL MODULE FOR XILINX FPGA
TPS54900
SLVS405 ? OCTOBER 2001
channel status read back codes
STATUS BYTE VALUE
(D0?D7)
00H
Non-zero
OUTPUT MEANING
Channel settled to regulation window
Channel not settled or fault condition (see Note 3)
NOTE 3: Fault conditions detected include over current fault on channel addressed and over temperature fault for device (all channels)
serial inter f ace protocol
The serial interface uses serial clock (SCLK), serial frame sync (SFS), serial data in (SDI), bank select inputs,
and outputs device status on serial data out (SDO). SFS and SDI inputs are sampled on the falling edge of
SCLK. An SFS pulse indicates that the bus master is ready to transmit a word, and the bit and frame counters
in the TPS54900 are reset when SFS is high. The first bit (b15) of the 16-bit word is shifted in on the next falling
edge of SCLK. The first eight bits of the word are denoted as the address or command, and the last eight bits
are data. Refer to the table titled Serial Command Bit Assignments .
The command consists of three fields: the R/W bit, channel select bits ADR2?0, and for device select bits
S3?S0. The R/W bit determines whether the data portion of the word is written to the TPS54900 or read from
the TPS54900. The value in the channel select field determines which output channel is to receive programming
data. Channel select bit ADR2 is compared to the logic level on the channel bank select input. This allows two
distinct TPS54900 devices to be addressed as one logical eight-channel unit. The remaining bits ADR1, ADR0
are decoded to select one of the four on chip channels. The third part of the command is the 4-bit device select,
bits S3?S0. The TPS54900 has been assigned a device ID of F for S3?S0. This value must be used to address
TPS54900 devices.
The data field, D7?D0, is used to program output voltage levels and control TPS54900 operation.
pass through mode
The pass through mode may be used to force a channel’s PMOSFETs to remain in the fully enhanced on state.
Use of the pass through mode is desirable under several conditions. First, transmitting high peak-to-peak
voltages requires maximum headroom on the line driver supply. Second, if the load current is too small, the line
ranger circuit is required to operate in discontinuous mode. The output may ring in response to transient
conditions. Low load current conditions may occur if the line driver is idle and the quiescent current has been
reduced to conserve power. If the line must remain ready to return to normal operation, the pass through mode
is appropriate. If the line is unused or can tolerate start up delays, the channel shutdown mode should be
considered to conserve additional power.
channel shut down
A bit value of 1 in bit 3 is used to shut down the addressed channel. Shutting down an unused channel is
recommended when power savings warrant complete power down of a line driver and start-up delays in
returning to normal operation are not critical.
global program
Data bit 2 in the serial word is the global turn-on and regulate signal. It is used to program all outputs to the same
voltage and start them up at the same time.
PWM clock initialization
Data bit 0 is used to initialize the onboard clocks. The signal to initialize the clocks is ANDed with data bit 5 and
cannot be given without powering down the TPS54900 and going through a complete restart sequence.
8
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