参数资料
型号: TPS61092RSARG4
厂商: TEXAS INSTRUMENTS INC
元件分类: 稳压器
英文描述: 2.5 A BATTERY CHARGE CONTROLLER, 700 kHz SWITCHING FREQ-MAX, PQCC16
封装: 4 X 4 MM, GREEN, PLASTIC, QFN-16
文件页数: 7/24页
文件大小: 753K
代理商: TPS61092RSARG4
www.ti.com
SW
C1
10
F
L1
6.8
H
R1
R2
VBAT
VOUT
R5
C2
2.2
F
C3
100
F
LBO
PGND
LBI
SYNC
EN
GND
TPS61092
List of Components:
U1 = TPS6109xRSA
L1 = Sumida CDRH103R-6R8
C1, C2, C5, C6 = X7R,X5R Ceramic
C3 = Low ESR Tantalum
DS1 = BAT54S
LBO
C5
0.1
F
DS1
C6
1
F
VCC2 -5 V
Unregulated
Auxiliary Output
Battery
Input
FB
VCC1 5 V
Boost Main Output
DETAILED DESCRIPTION
Synchronous Rectifier
Controller Circuit
TPS61090
TPS61091, TPS61092
SLVS484A – JUNE 2003 – REVISED APRIL 2004
Application Information (continued)
Figure 21. Power Supply Solution With Auxiliary Negative Output Voltage
The device integrates an N-channel and a P-channel MOSFET transistor to realize a synchronous rectifier.
Because the commonly used discrete Schottky rectifier is replaced with a low RDS(ON) PMOS switch, the power
conversion efficiency reaches 96%. To avoid ground shift due to the high currents in the NMOS switch, two
separate ground pins are used. The reference for all control functions is the GND pin. The source of the NMOS
switch is connected to PGND. Both grounds must be connected on the PCB at only one point close to the GND
pin. A special circuit is applied to disconnect the load from the input during shutdown of the converter. In
conventional synchronous rectifier circuits, the backgate diode of the high-side PMOS is forward biased in
shutdown and allows current flowing from the battery to the output. This device however uses a special circuit
which takes the cathode of the backgate diode of the high-side PMOS and disconnects it from the source when
the regulator is not enabled (EN = low).
The benefit of this feature for the system design engineer is that the battery is not depleted during shutdown of
the converter. No additional components have to be added to the design to make sure that the battery is
disconnected from the output of the converter.
The controller circuit of the device is based on a fixed frequency multiple feedforward controller topology. Input
voltage, output voltage, and voltage drop on the NMOS switch are monitored and forwarded to the regulator. So
changes in the operating conditions of the converter directly affect the duty cycle and must not take the indirect
and slow way through the control loop and the error amplifier. The control loop, determined by the error amplifier,
only has to handle small signal errors. The input for it is the feedback voltage on the FB pin or, at fixed output
voltage versions, the voltage on the internal resistor divider. It is compared with the internal reference voltage to
generate an accurate and stable output voltage.
The peak current of the NMOS switch is also sensed to limit the maximum current flowing through the switch and
the inductor. The typical peak current limit is set to 2200 mA.
An internal temperature sensor prevents the device from getting overheated in case of excessive power
dissipation.
15
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