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参数资料
| 型号： | TPS62410DRCR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 稳压器 |
| 英文描述： | 1.6 A DUAL SWITCHING CONTROLLER, 2500 kHz SWITCHING FREQ-MAX, PDSO10 |
| 封装： | 3 X 3 MM, PLASTIC, MLF-10 |
| 文件页数： | 9/33页 |
| 文件大小： | 1235K |
| 代理商： | TPS62410DRCR |
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DEF_1 PIN FUNCTION
180
° OUT OF PHASE OPERATION
SHORT-CIRCUIT PROTECTION
THERMAL SHUTDOWN
EasyScale: One Pin Serial Interface for Dynamic Output Voltage Adjustment
General
Protocol
Addressable Registers
SLVS737 – FEBRUARY 2007
DETAILED DESCRIPTION (continued)
The DEF_1 pin is dedicated to converter 1 and works as an analog input for adjustable output voltage setting.
Connecting an external resistor network to this pin adjusts the default output voltage to any value starting from
0.6V to VIN.
In PWM Mode the converters operate with a 180
° turn-on phase shift of the PMOS (high side) transistors. It
prevents the high side switches of both converters to be turned on simultaneously, and therefore smooths the
input current. This feature reduces the surge current drawn from the supply.
Both outputs are short-circuit protected with maximum output current = ILIMF(P-MOS and N-MOS). Once the
PMOS switch reaches its current limit, it will be turned off and the NMOS turned on. The PMOS only turns on
again, once the current in the NMOS decreases below the NMOS current limit.
As soon as the junction temperature, TJ, exceeds typically 150°C the device goes into thermal shutdown. In this
mode, the P and N-Channel MOSFETs are turned-off. The device continues its operation when the junction
temperature falls below the thermal shutdown hysteresis again.
EasyScale is a simple but very flexible one pin interface to configure the output voltage of both DC/DC
converters. The interface is based on a master – slave structure, where the master is typically a
Controller or
Application processor. Figure 27 and Table 2 give an overview of the protocol. The protocol consists of a device
specific address byte and a data byte. The device specific address byte is fixed to 4E hex. The data byte
consists of five bit for information, two address bits and the RFA bit. RFA bit set to high indicates the Request
For Acknowledge condition. The Acknowledge condition is only applied if the protocol was received correctly.
The advantage of EasyScale compared to other one-pin interfaces is that its bit detection is, to a large extent,
independent from the bit transmission rate. It can automatically detect bit rates between 1.7kBit/sec and up to
160kBit/sec. Furthermore, the interface is shared with the Mode/Data Pin and requires therefore no additional
pin.
All bits are transmitted MSB first and LSB last. Figure 28 shows the protocol without acknowledge request (bit
RFA = 0), Figure 29 with acknowledge (bit RFA = 1) request.
Prior to both bytes, device address byte and data byte, a start condition needs to be applied. For this, the
Mode/Data pin needs to be pulled high for at least tStart before the bit transmission starts with the falling edge. In
case the Mode/Data line was already at high level (forced PWM Mode selection) no start condition need be
applied prior the device address byte.
The transmission of each byte needs to be closed with an End Of Stream condition for at least TEOS.
In TPS62410 two registers with a data content of 5 bits can be addressed to change the output voltage of both
converters. With 5 bit data content, 32 different values for each register are available. Table 1 shows the
addressable registers if DEF_1 pin acts as analog input with external resistors connected.
The available output voltages for converter 1 are shown in Table 3, for converter 2 in Table 4. To generate these
output voltages, a precise internal resistor divider network is used, which makes external resistors unnecessary
and results therefore in an higher output voltage accuracy and less board space.
17
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