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| 型号： | TPS63061DSCR |
| 厂商： | Texas Instruments |
| 文件页数： | 15/32页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK BST SYNC 5V 1A 10SON |
| 标准包装： | 1 |
| 类型： | 降压（降压），升压（升压） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 5V |
| 输入电压： | 2.5 V ~ 12 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 2.4MHz |
| 电流 - 输出： | 1A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFQFN 裸露焊盘 |
| 包装： | 标准包装 |
| 供应商设备封装： | 10-SON 裸露焊盘（3x3） |
| 其它名称： | 296-30205-6 |
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SLVSA92A – DECEMBER 2011 – REVISED FEBRUARY 2012
DETAILED DESCRIPTION
DETAILED DESCRIPTION
The controller circuit of the device is based on an average current mode topology. The controller also uses input
and output voltage feedforward. Changes of input and output voltage are monitored and immediately can change
the duty cycle in the modulator to achieve a fast response to those errors. The voltage error amplifier gets its
feedback input from the FB pin. At adjustable output voltages, a resistive voltage divider must be connected to
that pin. At fixed output voltages, FB must be connected to the output voltage to directly sense the voltage. Fixed
output voltage versions use a trimmed internal resistive divider. The feedback voltage will be compared with the
internal reference voltage to generate a stable and accurate output voltage.
The device uses 4 internal N-channel MOSFETs to maintain synchronous power conversion at all possible
operating conditions. This enables the device to keep high efficiency over a wide input voltage and output power
range. To avoid ground shift problems due to the high currents in the switches, two separate ground pins GND
and PGND are used. The reference for all control functions is the GND pin. The power switches are connected to
PGND. Both grounds must be connected on the PCB at only one point, ideally, close to the GND pin. Due to the
4-switch topology, the load is always disconnected from the input during shutdown of the converter. To protect
the device from overheating an internal temperature sensor is implemented.
Buck-Boost Operation
To regulate the output voltage at all possible input voltage conditions, the device automatically switches from
buck operation to boost operation and back as required. It always uses one active switch, one rectifying switch,
one switch permanently on, and one switch permanently off. Therefore, it operates as a step down converter
(buck) when the input voltage is higher than the output voltage, and as a boost converter when the input voltage
is lower than the output voltage. There is no mode of operation in which all 4 switches are permanently
switching. Controlling the switches this way allows the converter to maintain high efficiency at the most important
point of operation, when the input voltage is close to the output voltage. The RMS current through the switches
and the inductor is kept at a minimum, to minimize switching and conduction losses.
Control Loop Description
The average inductor current is regulated by a fast current regulator loop which is controlled by a voltage control
loop. Figure 28 shows the control loop.
The non inverting input of the transconductance amplifier Gmc can be assumed to be constant. The output of
Gmv defines the average inductor current. The current through resistor RS, which represents the actual inductor
current, is compared to the desired value and the difference, or current error, is amplified and compared to the
sawtooth ramp of either the Buck or the Boost.
The Buck-Boost Overlap Control ? makes sure that the classical buck-boost function, which would cause two
switches to be on every half a cycle, is avoided. Thanks to this block whenever all switches becomes active
during one clock cycle, the two ramps are shifted away from each other. However, when there is no switching
activities because there is a gap between the ramps, the ramps are moved closer together. As a result the
number of classical buck-boost cycles or no switching is reduced to a minimum and high efficiency values are
achieved.
Slope compensation is not required to avoid subharmonic oscillation which are otherwise observed when working
with peak current mode control with D > 0.5.
Nevertheless the amplified inductor current downslope at one input of the PWM comparator must not exceed the
oscillator ramp slope at the other comparator input. This purpose is reached limiting the gain of the current
amplifier.
Copyright ? 2011 – 2012, Texas Instruments Incorporated
Product Folder Link(s): TPS63060 TPS63061
15
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