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参数资料
| 型号： | TPS65052RSMT |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 6-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC32 |
| 封装： | 4 X 4 MM, 0.40 MM PITCH, GREEN, PLASTIC, QFN-32 |
| 文件页数： | 36/40页 |
| 文件大小： | 1234K |
| 代理商： | TPS65052RSMT |
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SLVS710A – JANUARY 2007 – REVISED AUGUST 2007
ELECTRICAL CHARACTERISTICS (continued)
VCC = VINDCDC1/2 = 3.6 V, EN = VCC, MODE = GND, L = 2.2 μH, CO = 10 μF. TA = -40°C to 85°C, typical values are at
TA = 25°C (unless otherwise noted).
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
OUTPUT
Output voltage range for DCDC1,
externally adjustable
VINDCDC
VO
0.6
V
DCDC2
versions
1/2
externally adjustable
Vref
Reference voltage
600
mV
versions
VINDCDC1/2 = 2.5 V to 6 V
0 mA < IO = < IO(max)
-2%
0
2%
Mode = GND, PFM operation
DC output voltage
DCDC1,
VO
accuracy
DCDC2(1)
VINDCDC1/2 = 2.5 V to 6 V
0 mA < IO = < IO(max)
-1%
0
1%
Mode = VI, PWM operation
IO = 1 mA, Mode = GND, VO = 1.3 V,
ΔVO
Power save mode ripple voltage(2)
25
mVPP
Bandwith = 20 MHz
tStart
Start-up time
time from active EN to Start switching
170
μs
tRamp
VOUT Ramp up Time
time to ramp from 5% to 95% of VO
750
μs
RESET delay time
Input voltage at threshold pin rising
80
100
120
ms
PB-ONOFF debounce time
26
32
38
ms
VOL
RESET, PB_OUT output low voltage
IOL = 1 mA, Vhysteresis < 1 V, Vthreshold < 1 V
0.2
V
IOL
RESET, PB_OUT sink current
1
mA
RESET, PB_OUT output leakage
After PB_IN has been pulled high once; Vthreshold >
10
nA
current
1 V and Vhysteresis > 1 V, VOH = 6 V
Vth
Vthreshold, Vhysteresis threshold
0.98
1
1.02
V
VLDO1, VLDO2, VLDO3 and VLDO4 Low Dropout Regulators
Input voltage range for LDO1, LDO2,
VI
1.5
6.5
V
LDO3, LDO4
VO
LDO1 output voltage range
TPS65050, TPS65052 only
1.2
3.3
V
LDO2 output voltage range
TPS65050, TPS65052 only
1.8
3.3
V
LDO3 output voltage range
TPS65050, TPS65052 only
1.1
3.3
V
LDO4 output voltage range
TPS65050, TPS65052 only
1.2
2.85
V
Feedback voltage for FB_LDO1,
V(FB)
TPS65051, TPS65054 and TPS65056 only
1
V
FB_LDO2, FB_LDO3, and FB_LDO4
Maximum output current for LDO1,
IO
400
mA
LDO2
Maximum output current for LDO3,
200
mA
LDO4
I(SC)
LDO1 short-circuit current limit
VLDO1 = GND
750
mA
LDO2 short-circuit current limit
VLDO2 = GND
850
mA
LDO3 and LDO4 short-circuit current
VLDO3 = GND, VLDO4 = GND
420
mA
limit
Dropout voltage at LDO1
IO = 400 mA, VINLDO = 3.4 V
400
mV
Dropout voltage at LDO2
IO = 400 mA, VINLDO = 1.8 V
280
mV
Dropout voltage at LDO3, LDO4
IO = 200 mA, VINLDO = 1.8 V
280
mV
Leakage current from VinLDOx to
LDO enabled, VINLDO = 6.5 V, VO = 1 V,
Ilkg
3
μA
VLDOx
at TA = 140°C
Output voltage accuracy for LDO1,
VO
IO = 10 mA
-2%
1%
LDO2, LDO3, LDO4
VINLDO1,2 = VLDO1,2 + 0.5 V (min. 2.5 V) to 6.5V,
Line regulation for LDO1, LDO2,
VINLDO3,4 = VLDO3,4 + 0.5 V (min. 2.5 V) to 6.5V,
-1%
1%
LDO3, LDO4
IO = 10 mA
Load regulation for LDO1, LDO2,
IO = 0 mA to 400 mA for LDO1, LDO2
-1%
1%
LDO3, LDO4
IO = 0 mA to 200 mA for LDO3, LDO4
Regulation time for LDO1, LDO2,
Load change from 10% to 90%
10
μs
LDO3, LDO4
PSRR
Power supply rejection ratio
f = 10 kHz; IO = 50 mA; VI = VO + 1 V
70
dB
(1)
Output voltage specification does not include tolerance of external voltage programming resistors.
(2)
In Power Save Mode, operation is typically entered at IPSM = VI / 32 .
Copyright 2007, Texas Instruments Incorporated
5
Product Folder Link(s): TPS65050, TPS65051, TPS65052 TPS65054, TPS65056
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|---|---|
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