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参数资料
| 型号： | TPS65230DCA |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO48 |
| 封装： | HTSSOP-48 |
| 文件页数： | 2/26页 |
| 文件大小： | 899K |
| 代理商： | TPS65230DCA |
SOFT START
BROWNOUT MONITOR (BOR)
SLVSA10A – SEPTEMBER 2009 – REVISED SEPTEMBER 2009.................................................................................................................................... www.ti.com
voltage protection threshold and shut down the BUCK controller. Buck 2 and 3 show a similar mode of operation.
All converters operate in hiccup mode: Once an over-current is sensed, the controller shuts off the converter for
a given time and then tries to start again. If the overload has been removed, the converter will ramp up and
operate normally. If this is not the case the converter will see another over-current event and shuts-down again
repeating the cycle (hiccup) until the failure is cleared.
Soft start (SS) for all three BUCKs is controlled by a single capacitor connected to the SS pin and an internal
current source. When one of the BUCKs is enabled, the SS capacitor is pre-charged to the output voltage
divided by the feed-back ratio before the internal SS current source starts charging the external capacitor. The
output voltage of the BUCK ramps up as the SS pin voltage increased from its pre-charged value to 0.8 V. The
soft start time is calculated from the SS supply current (ISS) and the capacitor value and has a typical value of
0.4 ms/nF or 1.3 ms for a 3.3-nF capacitor connected to the SS pin. Before the next rail is enabled, the SS cap is
discharged and the SS cycle starts over again.
The TPS65230 and TPS65231 monitor the input supply and issues a warning if the input voltage drops below the
BOR threshold of 9.3 V. The nBOR/nHOT pin is pulled low to alarm the host processor of the brown-out
condition. nBOR is released after the supply voltage has risen above 10.8 V. nBOR/nHOT pin is also pulled low
when the chip temperature rises above the HOT threshold and is released when the chip has cooled off. The
purpose of the nBOR/nHOT function is to give the host processor time to finish operations and store data before
the system shuts down. Both events, BOR and HOT, are individually flagged in the STATUS1 register. Note that
unlike the INT output pin, reading the STATUSx registers has no effect on the state of the nBOR/nHOT pin in I2C
mode. nBOR/nHOT depends only of the input voltage and temperature condition.
10
Copyright 2009, Texas Instruments Incorporated
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