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参数资料
| 型号： | TPS65230DCA |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO48 |
| 封装： | HTSSOP-48 |
| 文件页数： | 6/26页 |
| 文件大小： | 899K |
| 代理商： | TPS65230DCA |
START CONDITION
. . .
ACKNOWLEDGE
STOP CONDITION
SCL
SDA
1
2
3
4
5
6
7
8
9
. . .
P
S
P
t S( D AT )
t S (S TA )
t S (S TO )
tH I G H
t H (D A T )
t H (S TA )
t LO W
t r(
t F
t H (S T A)
t (B U F)
S C L
S D A
SLVSA10A – SEPTEMBER 2009 – REVISED SEPTEMBER 2009.................................................................................................................................... www.ti.com
ACK —
Acknowledge
S(7:0) —
Subaddress: defined per register map
D(7:0) —
Data: data to be loaded into the device
Stop —
Stop condition
The I2C Bus is a communications link between a controller and a series of slave terminals. The link is established
using a two-wired bus consisting of a serial clock signal (SCL) and a serial data signal (SDA). The serial clock is
sourced from the controller in all cases where the serial data line is bi-directional for data communication
between the controller and the slave terminals. Each device has an open drain output to transmit data on the
serial data line. An external pull-up resistor must be placed on the serial data line to pull the drain output high
during data transmission.
Data transmission is initiated with a start bit from the controller as shown in Figure 7. The start condition is
recognized when the SDA line transitions from high to low during the high portion of the SCL signal. Upon
reception of a start bit, the device will receive serial data on the SDA input and check for valid address and
control information. If the appropriate group and address bits are set for the device, then the device will issue an
acknowledge pulse and prepare the receive subaddress data. Subaddress data is decoded and responded to as
per the Register Map section of this document. Data transmission is completed by either the reception of a stop
condition or the reception of the data word sent to the device. A stop condition is recognized as a low to high
transition of the SDA input during the high portion of the SCL signal. All other transitions of the SDA line must
occur during the low portion of the SCL signal. An acknowledge is issued after the reception of valid address,
sub-address and data words. The I2C interface will auto-sequence through register addresses, so that multiple
Figure 7. I2C Start / Stop / Acknowledge Protocol
Figure 8. I2C Data Transmission Timing
14
Copyright 2009, Texas Instruments Incorporated
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