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参数资料
| 型号： | TS-MAC-P2-UT4 |
| 厂商： | Lattice Semiconductor Corporation |
| 文件页数： | 43/66页 |
| 文件大小： | 0K |
| 描述： | SITE LICENSE ETH MAC TRI ECP2 |
| 标准包装： | 1 |
| 系列： | * |
| 其它名称： | TSMACP2UT4 |
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Lattice Semiconductor
IP Core Generation and Evaluation
The design flow for IP created with the IPexpress tool uses a post-synthesized module (NGO) for synthesis and a
protected model for simulation. The post-synthesized module is customized and created during the IPexpress tool
generation.
Table 4-1 provides a list of key files and directories created by the IPexpress tool and how they are used. The IPex-
press tool creates several files that are used throughout the design cycle. The names of most of the created files
are customized to the user’s module name specified in the IPexpress tool. These are all of the files needed to
implement and verify the TSMAC IP core in a top-level design.
Table 4-1. File List
File
< username >.lpc
< username >.ipx
< username >.ngo
< username >_bb.v/.vhd
< username >_inst.v/.vhd
< username >_beh.v/.vhd
Description
This file contains the IPexpress tool options used to recreate or modify the core in the IPexpress
tool.
The IPX file holds references to all of the elements of an IP or Module after it is generated from the
IPexpress tool (Diamond version only). The file is used to bring in the appropriate files during the
design implementation and analysis. It is also used to re-load parameter settings into the IP/Mod-
ule generation GUI when an IP/Module is being re-generated.
This file provides the synthesized IP core.
This file provides the synthesis black box for the user’s synthesis.
This file provides an instance template for the TSMAC IP core.
This file provides the front-end simulation library for the TSMAC IP core.
Table 4-2 provides a list of key additional files providing IP core generation status information and command line
generation capability are generated in the user's project directory.
Table 4-2. Additional Files
File
< username >_generate.tcl
Description
Created when GUI “Generate” button is pushed, invokes generation, may be run from command
line.
< username >_generate.log Diamond or ispLEVER synthesis and map log file.
< username >_gen.log
IPexpress IP generation log file
The \<ts_mac_eval> and subtending directories provide files supporting TSMAC IP core evaluation. The
\<ts_mac_eval> directory shown in Figure 4-3 contains files and folders with content that is constant for all con-
figurations of the TSMAC. The \< username > subfolder ( \tri_speed_mac_core0 in this example) contains
files and folders with content specific to the username configuration.
The \ts_mac_eval directory is created by IPexpress the first time the core is generated and updated each time
the core is regenerated. A \< username > directory is created by IPexpress each time the core is generated and
regenerated each time the core with the same file name is regenerated. A separate \<username> directory is gen-
erated for cores with different names, e.g. \<tsmac0>, \<tsmac1> , etc.
Instantiating the Core
The generated TSMAC IP core package includes black-box (< username >_bb.v/vhd) and instance (< user-
name >_inst.v/vhd) templates (Verilog or VHDL) that can be used to instantiate the core in a top-level design. An
example RTL top-level reference source file that can be used as an instantiation template for the IP core is provided
in \< project_dir >\ts_mac_eval\< username >\src\rtl\top . Users may also use this top-level reference
as the starting template for the top-level for their complete design.
IPUG51_03.0, December 2010
43
Tri-Speed Ethernet MAC User’s Guide
相关PDF资料 |
PDF描述 |
|---|---|
| TS-MAC-E3-UT4 | SITE LICENSE ETH MAC TRI ECP3 |
| TS-MAC-E2-UT4 | SITE LICENSE ETH MAC TRI EC/ECP |
| VI-J0T-EZ-F1 | CONVERTER MOD DC/DC 6.5V 25W |
| VI-J0T-EY-S | CONVERTER MOD DC/DC 6.5V 50W |
| VI-J0R-EZ-F4 | CONVERTER MOD DC/DC 7.5V 25W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TSMACPMU2 | 功能描述:以太网模块 TriSpd Ethernet MAC RoHS:否 制造商:Lantronix 产品:Device Servers 数据速率:300 bps to 921.6 kbps, 10 Mbps, 100 Mbps 接口类型:Ethernet, Serial 工作电源电压:5 V to 15 V 工作电源电流:133 mA to 400 mA 最大工作温度:+ 70 C |
| TS-MAC-PM-U3 | 功能描述:开发软件 Ethernet MAC TriSPD RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| TS-MAC-PM-U4 | 功能描述:开发软件 Ethernet MAC Tri-Speed RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| TS-MAC-PM-UT4 | 功能描述:开发软件 ETHERNET MAC TRI-SPEED RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors |
| TSMACSCU2 | 功能描述:以太网模块 TriSpd Ethernet MAC RoHS:否 制造商:Lantronix 产品:Device Servers 数据速率:300 bps to 921.6 kbps, 10 Mbps, 100 Mbps 接口类型:Ethernet, Serial 工作电源电压:5 V to 15 V 工作电源电流:133 mA to 400 mA 最大工作温度:+ 70 C |
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