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| 型号： | TS(X)PC603PMA6ME |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 166 MHz, RISC PROCESSOR, CQFP240 |
| 封装： | CERQUAD-240 |
| 文件页数： | 24/38页 |
| 文件大小： | 704K |
| 代理商： | TS(X)PC603PMA6ME |
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TSPC603p
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D Asynchronous, maskable - The external, SMI, and decrementer interrupts are maskable asynchronous exceptions. When
these exceptions occur, their handling is postponed until the next instruction, and any exceptions associated with that instruction,
completes execution. If there are no instructions in the execution units, the exception is taken immediately upon determination
of the correct restart address (for loading SRR0).
D Asynchronous, non maskable - There are two non maskable asynchronous exceptions : system reset and the machine check
exception. These exceptions may not be recoverable, or may provide a limited degree of recoverability. All exceptions report
recoverability through the SMR[RI] bit.
5.4.2. PowerPC 603p microprocessor exception model
A specified by the PowerPC architecture, all 603p exceptions can be described as either precise or imprecise and either synchronous
or asynchronous. Asynchronous exceptions (some or which are maskable) are caused by events external to the processor’s execu-
tion ; synchronous exceptions, which are all handled precisely by the 603p, are caused by instructions. The 603p exception classes
are shown in Table 14.
Synchronous/Asynchronous
precise/Imprecise
Exception type
Asynchronous, non maskable
Imprecise
Machine check
System reset
Asynchronous, maskable
Precise
External interrupt
Decrementer
System management interrupt
Synchronous
Precise
Instruction-caused exceptions
Table 15 : PowerPC 603p microprocessor exception classifications
Although exceptions have other characteristics as well, such as whether they are maskable or non maskable, the distinctions shown
in Table 15 define categories of exceptions that the 603p handles uniquely. Note that Table 15 includes no synchronous imprecise
instructions. While the PowerPC architecture supports imprecise handling of floating-point exceptions, the 603p implements these
exception modes as precise exceptions.
The 603p’s exceptions, and conditions that cause them, are listed in Table 16. Exceptions that are specific to the 603p are indicated.
相关PDF资料 |
PDF描述 |
|---|---|
| TSPC603PVGU8ME | 32-BIT, 200 MHz, RISC PROCESSOR, CBGA255 |
| TSPC603PVGU/T6ME | 32-BIT, 166 MHz, RISC PROCESSOR, CBGA255 |
| TSPC603PVG6ME | 32-BIT, 166 MHz, RISC PROCESSOR, CBGA255 |
| TSPC603PMGB/C8ME | 32-BIT, 200 MHz, RISC PROCESSOR, CBGA255 |
| TSPC603PMGB/C6ME | 32-BIT, 166 MHz, RISC PROCESSOR, CBGA255 |
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