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参数资料
| 型号： | TS(X)PC603PVAU/T6ME |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 166 MHz, RISC PROCESSOR, CQFP240 |
| 封装： | CERQUAD-240 |
| 文件页数： | 9/38页 |
| 文件大小： | 704K |
| 代理商： | TS(X)PC603PVAU/T6ME |
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TSPC603p
17/38
4. ELECTRICAL CHARACTERISTICS
4.1. General requirements
All static and dynamic electrical characteristics specified for inspection purposes and the relevant measurement conditions are given
below :
- Table 9 : Static electrical characteristics for the electrical variants.
- Table 10 : Dynamic electrical characteristics for the 603p.
These specifications are for 166 MHz and 200 MHz processor core frequencies. The processor core frequency is determined by the
bus (SYSCLK) frequency and the settings of the PLL_CFG0 to PLL_CFG3 signals. All timings are specified respective to the rise
edge of SYSCLK.
4.2. Static characteristics
Table 9 : Electrical characteristics
Vdd = AVdd = 2.5 V
± 5 % ; OVdd = 3.3 ± 5 % V dc, GND = 0 V dc, –55°C ≤ Tc ≤ 125°C
Characteristics
Symbol
Min
Max
Unit
Input high voltage (all inputs except SYSCLK)
VIH
2.0
5.5
V
Input low voltage (all inputs except SYSCLK)
VIL
GND
0.8
V
SYSCLK input high voltage
CVIH
2.4
5.5
V
SYSCLK input low voltage
CVIL
GND
0.4
V
Input leakage current
Vin = 3.465 V(1, 3)
Iin
-
30
mA
Vin = 5.5 V(1, 3)
Iin
-
300
mA
Hi-Z (off-state)
Vin = 3.465 V(1, 3)
leakage current
ITSI
-
30
mA
Vin = 5.5 V(1, 3)
ITSI
-
300
mA
Output high voltage
IOH = –7 mA
VOH
2.4
-
V
Output low voltage
IOL = +7 mA
VOL
-
0.4
V
Capacitance, Vin = 0 V, f = 1 MHz(2)
(excludes TS, ABB, DBB, and ARTRY)
Cin
-
10.0
pF
Capacitance, Vin = 0 V, f = 1 MHz(2)
(for TS, ABB, DBB, and ARTRY)
Cin
-
15.0
pF
Notes:
1. Excludes test signals (LSSD_MODE, L1_TSTCLK, L2_TSTCLK, and JTAG signals).
2. Capacitance is periodically sampled rather than 100 % tested.
3. Leackage currents are measured for nominal OVdd/Vdd or both OVdd/Vdd. Same variation (for example, both Vdd and OVdd vary by
either +5 % or –5 %).
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