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参数资料
| 型号： | TS3V912IN |
| 厂商： | 意法半导体 |
| 英文描述： | IC-DUAL RAIL/RAIL AM |
| 中文描述： | 集成电路双轨/铁路上午 |
| 文件页数： | 3/11页 |
| 文件大小： | 117K |
| 代理商： | TS3V912IN |
ELECTRICAL CHARACTERISTICS
V
CC+
= 3V, V
CC-
= 0V,R
L
,C
L
connectedto V
CC
/2, T
amb
= 25
o
C (unlessotherwise specified)
Symbol
Parameter
TS3V912I/AI/BI
Min.
Typ.
Unit
Max.
10
5
2
12
7
3
V
io
Input Offset Voltage (V
ic
= V
o
= V
CC
/2)
TS3V912
TS3V912A
TS3V912B
TS3V912
TS3V912A
TS3V912B
T
min.
≤
T
amb
≤
T
max.
mV
DV
io
I
io
Input Offset Voltage Drift
Input Offset Current - (note 1)
T
min.
≤
T
amb
≤
T
max.
Input Bias Current - (note 1)
T
min.
≤
T
amb
≤
T
max.
Supply Current (per amplifier, A
VCL
= 1, no load)
T
min.
≤
T
amb
≤
T
max.
Common Mode Rejection Ratio
Supply Voltage Rejection Ratio (V
CC+
= 2.7 to 3.3V, V
O
= V
CC
/2)
Large Signal Voltage Gain (R
L
= 10k
, V
O
= 1.2V to 1.8V)
T
min.
≤
T
amb
≤
T
max.
High Level Output Voltage (V
id
= 1V)
5
1
μ
V/
o
C
pA
100
200
150
300
300
400
I
ib
1
pA
I
CC
200
μ
A
CMR
SVR
A
vd
V
ic
= 0 to 3V, V
o
= 1.5V
70
80
10
dB
dB
V/mV
50
3
2
2.95
2.9
2.3
V
OH
R
L
= 100k
R
L
= 10k
R
L
= 600
R
L
= 100
T
min.
≤
T
amb
≤
T
max.
R
L
= 10k
R
L
= 600
R
L
= 100k
R
L
= 10k
R
L
= 600
R
L
= 100
2.8
2.1
2.96
2.6
2
V
V
OL
Low Level Output Voltage (V
id
= -1V)
T
min.
≤
T
amb
≤
T
max.
R
L
= 10k
R
L
= 600
Source
Sink
30
300
900
50
70
400
100
600
mV
I
o
Output Short Circuit Current (V
id
=
±
1V)
(V
o
= V
)
(V
o
= V
CC
)
20
20
40
40
mA
GBP
Gain Bandwidth Product
(A
VCL
= 100, R
L
= 10k
, C
L
= 100pF, f = 100kHz)
Slew Rate (A
VCL
= 1, R
L
= 10k
, C
L
= 100pF, V
i
= 1.3V to 1.7V)
Slew Rate (A
VCL
= 1, R
L
= 10k
, C
L
= 100pF, V
i
= 1.3V to 1.7V)
Phase Margin
0.8
0.4
0.3
30
MHz
SR
+
SR
-
m
V/
μ
s
V/
μ
s
Degrees
nV
√
Hz
dB
e
n
Equivalent Input Noise Voltage (R
s
= 100
, f = 1kHz)
30
V
O1
/V
O2
Note 1:
Maximum values including unavoidable inaccuracies of the industrial test.
Channel Separation (f = 1kHz)
120
TS3V912
3/11
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