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参数资料
| 型号： | TSM108IDT |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 稳压器 |
| 英文描述： | SWITCHING CONTROLLER, 130 kHz SWITCHING FREQ-MAX, PDSO14 |
| 封装： | PLASTIC, MICRO, SOP-14 |
| 文件页数： | 11/13页 |
| 文件大小： | 387K |
| 代理商： | TSM108IDT |
TSM108
7/13
5. Gate Drive
The Gate Drive stage is directly commanded from
the PWM output signal. The Gate Drive stage is a
totem pole Mosfet stage which bears different On
resistances in order to ensure a slower turn ON
than turn OFF of the P-Channel MOSFET. The
values of the output Gate Drive currents are given
by Isink (switch ON) and Isource (switch OFF).
The Gate Drive stage bears an integrated voltage
clamp which will prevent the P-Channel MOSFET
gate to be driven with voltages higher than 15V
(acting like a zener diode between Vcc and GD
(Gate Drive) pin.
6. Under Voltage Lock-Out, Over Voltage
Lock-Out
The UVLO and OVLO security functions aim at the
global application security.
When the Power supply decreases, there is the in-
herent risk to drive the P-Channel MOSFET with
insufficient Gate voltage, and therefore to lead the
MOSFET to linear operation, and to its destruc-
tion.
The UVLO is an input power supply voltage detec-
tion which imposes a complete switch OFF of the
P-Channel MOSFET as soon as the Power Sup-
ply decreases below UV. To avoid unwanted oscil-
lation of the MOSFET, a fixed hysteresis margin is
integrated (UVhyst).
UVLO is internally programmed to ensure 8V min
and 9V max, but thresholds can be adjusted by
adding an external voltage divider to modify the
value. The resistors typical values are given (Ru-
vh, Ruvl).
The OVLO is fixing the supply voltage at which the
device (and the external power section) is
switched OFF.
OVLO is internally programmed to ensure 32V
min. and 33V max., but it can be adjusted with an
external voltage divider.
Examples:
Let's suppose that the internally set value of the
UVLO and / or OVLO level should be modified in a
specific application, or under specific require-
ments.
6.1. UVLO decrease:
If the UVLO level needs to be lowered (UV1), an
additional resistor (Ruvh1) must be connected be-
tween UV and Vcc following the equation:
UV = Vref (Ruvh/Ruvl +1)
UV1 = Vref ((Ruvh//Ruvh1)/Ruvl +1)
(i)
where Ruvh//Ruvh1 means that Ruvh1 is in paral-
lel to Ruvh
Solving i. we obtain:
Ruvh1 = Ruvl x Ruvh (UV1 - Vref) / (Vref x
Ruvh - Ruvl (UV1 - Vref))
As an example, if UV1 needs to be set to 6V,
Ruvh1 = 256k
6.2. UVLO increase:
If the UVLO level needs to be increased (UV2), an
additional resistor (Ruvl2) must be connected be-
tween UV and Gnd following the equation.
UV = Vref (Ruvh/Ruvl +1)
UV1 = Vref (Ruvh/(Ruvl//Ruvl2) +1)
(ii)
where Ruvl//Ruvl2 means that Ruvl2 is in parallel
to Ruvl
Solving ii. we obtain:
Ruvl2 = Vref x Ruvh Ruvl / (UV2 x Ruvl -
Vref x (Ruvh + Ruvl))
As an example, if UV2 needs to be set to 12V,
Ruvl2 = 132k
6.3. OVLO decrease:
If the OVLO level needs to be lowered (OV1), an
additional resistor (Rovh1) must be connected be-
tween OV and Vcc following the equation:
OV = Vref (Rovh/Rovl +1)
OV1 = Vref ((Rovh//Rovh1)/Rovl +1)
(iii)
where Rovh//Rovh1 means that Rovh1 is in paral-
lel to Rovh
Solving iii. we obtain:
Rovh1 = Rovl x Rovh (OV1 - Vref) / (Vref x
Rovh - Rovl (OV1 - Vref))
As an example, if OV1 needs to be set to 25V,
Rovh1 = 867k
6.4. OVLO increase:
If the OVLO level needs to be increased (OV2), an
additional resistor (Rovl2) must be connected be-
tween OV and Gnd following the equation.
OV = Vref (Rovh/Rovl +1)
OV2 = Vref (Rovh/(Rovl//Rovl2) +1)
(iv)
where Rovl//Rovl2 means that Rovl2 is in parallel
to Rovl
Solving iv. we obtain:
Rovl2 = Vref x Rovh Rovl / (OV2 x Rovl -
Vref x (Rovh + Rovl))
As an example, if OV2 needs to be set to 40V,
Rovl2 = 87k
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