TSM108
3/13
ELECTRICAL CHARACTERISTICS
T
amb = 25°C, VCC + 12V (unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
CURRENT CONSUMPTION
ICC
Current Consumption
4
7
mA
STANDBY
Istby
Current Consumption in Standby Mode
150
A
Vsh
Input Standby Voltage High Impedance
Internal Pull up resistor.
Stby pin should be left
open
2V
Vsl
Input Standby Voltage Low
0.8
V
OSCILLATOR
FOSC
Frequency of the Oscilator
COSC = 220pF
70
100
130
kHz
VOLTAGE CONTROL 1) 2)
1. Vref parameter indicates global precision of the voltage control loop.
2. Control Gain : Av = 95dB ; Input Resistance : Rin = infinite ; Output Resistance : Rout = 700M ; Output Source/Sink Current :
Iso, Isi = 150A ; Recommended values for the compensation network are : 22nF & 22k in series between output and ground.
Vref
Voltage Control Reference
Tamb = 25°C
-25°C < Tamb < 85°C
2.450
2.520
2.590
V
CURRENT CONTROL 3) 4) 5)
3. Vsense parameter indicated global precision of the current control loop.
4. Control Gain : Av = 105dB ; Input Resistance : Rin =380k ; Output Resistance : Rout = 105M ; Output Source/Sink Current :
Iso, Isi = 150A ; Recommended values for the compensation network are : 22nF & 22k in series between output and ground.
5. A current foldback function is implemented thanks to a systematic -6mV negative offset on the current amplifier inputs which
protects the battery from over charging current under low battery voltage conditiions, or output short circuit conditions.
Vsense
Current Control Reference Voltage
Tamb = 25°C
-25°C < Tamb < 85°C
196
191
206
216
221
mV
GATE DRIVE - P CHANNEL MOSFET DRIVE
Isink
Sink Current - Switch ON
Tamb = 25°C
-25°C < Tamb < 85°C
15
40
mA
Isource
Source Current - Swith OFF
Tamb = 25°C
-25°C < Tamb < 85°C
30
80
mA
Cload
Input Capacitance of the PMOSFET 6)
6. The Gate Drive output stage has been optimized for PMosfets with input capacitance equal to Cload. A bigger Mosfet (with input
capacitance higher than Cload) can be used with TSM108, but the gate drive performances will be reduced (in particular when
reaching the Dmax. PWM mode).
11.5
nF
PWM
max.
Maximum Duty Cycle of the PWM function
95
100
%
UVLO
UV
Under Voltage Lock Out 7)
7. The given limits comprise the hysteresis (UVhyst).
-25°C < Tamb < 85°C
8
9
V
UVhyst
UVLO Voltage Hysteresis - low to high
200
mV
Ruvl
Upper Resistor of UVLO bridge 8)
8. It is possible to modify the UVLO and OVLO limits by adding a resistor (to ground or to VCC) on the pins UV and OV.
The internal values of the resistor should be taken into account.
Tamb = 25°C
184
k
Ruvl
Lower Resistor of UVLO bridge (see note 8)
Tamb = 25°C
76.5
k
OVLO
OV
Over Voltage Lock Out (see note 7)
-25°C < Tamb < 85°C
32
35
V
OVhyst
OVLO Voltage Hysteresis - low to high
400
mV
Rovl
Upper Resistor of OVLO bridge (see note 8)
Tamb = 25°C
275
k
Rovl
Lower Resistor of OVLO bridge (see note 8)
Tamb = 25°C
23.2
k