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参数资料
| 型号： | TSPC860SRMZPU40D4 |
| 厂商： | E2V TECHNOLOGIES PLC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 40 MHz, RISC PROCESSOR, PBGA357 |
| 封装： | PLASTIC, BGA-357 |
| 文件页数： | 5/90页 |
| 文件大小： | 2351K |
| 代理商： | TSPC860SRMZPU40D4 |
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13
TSPC860
2129A–HIREL–08/02
WE0
BS_B0
IORD
High
C7
Output
Write Enable 0 — Output asserted when a write access to an
external slave controlled by the GPCM is initiated by the TSPC860
.
WE0 is asserted if D(0-7) contains valid data to be stored by the
slave device.
Byte Select 0 on UPMB — Output asserted under control of the
UPMB, as programmed by the user. In a read or write transfer, the
line is only asserted if D(0-7) contains valid data.
IO Device Read — Output asserted when the TSPC860 starts a read
access to a region controlled by the PCMCIA interface. Asserted
only for accesses to a PC card I/O space.
WE1
BS_B1
IOWR
High
A6
Output
Write Enable 1 — Output asserted when the TSPC860 initiates a
write access to an external slave controlled by the GPCM. WE1 is
asserted if D(8-15) contains valid data to be stored by the slave
device.
Byte Select 1 on UPMB — Output asserted under control of the
UPMB, as programmed by the user. In a read or write transfer, the
line is only asserted if D(8-15) contains valid data.
I/O Device Write — This output is asserted when the TSPC860
initiates a write access to a region controlled by the PCMCIA
interface. IOWR is asserted only if the access is to a PC card I/O
space.
WE2
BS_B2
PCOE
High
B6
Output
Write Enable 2 — Output asserted when the TSPC860 starts a write
access to an external slave controlled by the GPCM. WE2 is
asserted if D(16-23) contains valid data to be stored by the slave
device.
Byte Select 2 on UPMB — Output asserted under control of the
UPMB, as programmed by the user. In a read or write transfer,
BS_B2 is asserted only D(16-23) contains valid data.
PCMCIA Output Enable — Output asserted when the TSPC860
initiates a read access to a memory region under the control of the
PCMCIA interface.
WE3
BS_B3
PCWE
High
A5
Output
Write Enable 3 — Output asserted when the TSPC860 initiates a
write access to an external slave controlled by the GPCM. WE3 is
asserted if D(24-31) contains valid data to be stored by the slave
device.
Byte Select 3 on UPMB — Output asserted under control of the
UPMB, as programmed by the user. In a read or write transfer,
BS_B3 is asserted only if D(24-31) contains valid data.
PCMCIA Write Enable — Output asserted when the TSPC860
initiates a write access to a memory region under control of the
PCMCIA interface.
BS_A(0-3)
High
D8, C8,
A7, B8
Output
Byte Select 0 to 3 on UPMA — Outputs asserted under requirement
of the UPMB, as programmed by the user. For read or writes,
asserted only if their corresponding data lanes contain valid data:
BS_A0 for D(0-7), BS_A1 for D(8-15),
BS_A2 for D(16-23), BS_A3 for D(24-31)
Table 1. Signal Descriptions (Continued)
Name
Reset
Number
Type
Description
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PDF描述 |
|---|---|
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| TSPC860SRMZQU66D | 制造商:e2v technologies 功能描述:MPU RISC 32BIT 66MHZ 3.3V 357BGA - Trays |
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