参数资料
型号: UBA2015P/1,112
厂商: NXP Semiconductors
文件页数: 7/42页
文件大小: 0K
描述: IC LAMP DVR FLUORES 600V 20-DIP
标准包装: 20
类型: CFL/TL 驱动器
电流 - 电源: 1.7mA
电源电压: 11.9 V ~ 13.8 V
工作温度: -40°C ~ 125°C
封装/外壳: 20-DIP(0.300",7.62mm)
供应商设备封装: 20-DIP
包装: 管件
其它名称: UBA2015P1112
NXP Semiconductors
V DSRmains
Dbypass
UBA2016A/15/15A
600 V fluorescent lamp driver
V o(PFC)
l i(PFC)
LPFC
DPFC
Iswitch(PFC)
QPFC
l o(PFC)
R1
mains
AUXPFC
R3
GPFC
R2
FBPFC
CBUS
C1
C2
R4
COMPPFC
UBA2016A
UBA2015
UBA2015A
VDD
GND
001aam533
Fig 6.
Basic PFC application diagram
7.2.1 Regulation loop
The control loop senses the PFC output voltage via resistors R1, R2 and the feedback
input FBPFC. The frequency compensation network C1, C2 and R4 sets the response
time and stability of the loop. The voltage at pin FBPFC is regulated to V reg(FBPFC) . When
voltage on pin FBPFC is above the regulation voltage, pin COMPPFC is charged and
when voltage on pin FBPFC is lower, pin COMPPFC is discharged. Current flow through
pin COMPPFC is controlled by the PFC Operational Transconductance Amplifier (OTA)
and its transconductance g m(PFC) . The voltage on pin COMPPFC controls the PFC
on-time, t on(PFC) . So when the voltage at pin FBPFC is too high, t on(PFC) is reduced and
less energy is transferred. When voltage at pin FBPFC is too low, t on(PFC) is increased and
more energy is transferred.
The voltage on pin FBPFC is sampled at the rising edge of pin GPFC and held internally
during the leading edge blanking time t leb(FBPPC) before going to the OTA to prevent
disturbance of the regulation level due to transition effects when the PFC external power
switch is turned on
The maximum t on(PFC) is set when the voltage at pin COMPPFC is clamped to
V clamp(COMPPFC) to limit the dead time in recovering regulation after a regulation range
overshoot. The t on(PFC) time can be regulated down to zero. The moment at which the
gate is turned on is determined by pin AUXPFC. When this pin is below demagnetization
detection voltage V det(demag)AUXPFC and the low PFC off-time t off(PFC)low timer is finished,
the next cycle starts.
During start-up, the capacitor connected to pin COMPPFC is connected by an internal
switch to pin FBPFC which allows it to partially charge before the PFC starts. This reduces
the start-up time.
UBA2016A_15_15A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 16 November 2011
? NXP B.V. 2011. All rights reserved.
7 of 42
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