参数资料
型号: UCC2891DR
厂商: Texas Instruments
文件页数: 8/41页
文件大小: 0K
描述: IC REG CTRLR FLYBK ISO CM 16SOIC
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 1MHz
占空比: 74%
电源电压: 8.5 V ~ 16 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
UCC2891, UCC2892
UCC2893, UCC2894
SLUS542F ? OCTOBER 2003 ? REVISED JULY 2009
DETAILED PIN DESCRIPTIONS
RDEL (pin 1)
This pin is internally connected to an approximately 2.5-V DC source. A resistor (R DEL ) to GND (pin 6) sets the
turn-on delay for both gate drive signals of the UCC2981 family of controllers. The delay time is identical for both
switching transitions, between OUT (pin 13) is turning off and AUX (pin 14) is turning on as well as when AUX
(pin 14) is turning off and OUT (pin 13) is turning on. The delay time is defined as:
t DEL1 + t DEL2 + 11.1
10 * 12
R DEL ) 15
10 * 9 seconds
(1)
For proper selection of the delay time refer to the various references describing the design of active clamp power
converters.
RTON (pin 2)
This pin is internally connected to an approximately 2.5-V DC source. A resistor (R ON ) to GND (pin 6) sets the
charge current of the internal timing capacitor. The RTON pin, in conjunction with the RTOFF pin (pin 3) are used
to set the operating frequency and maximum operating duty cycle of the UCC2891 family.
RTOFF (pin3)
This pin is internally connected to an approximately 2.5-V DC source. A resistor (R OFF ) to GND (pin 6) sets the
discharge current of the internal timing capacitor. The RTON and RTOFF pins are used to set the switching
period (T SW ) and maximum operating duty cycle (D MAX ) according to the following equations:
t ON + 36.1
10 * 12
R ON * t DEL1 seconds
(2)
t OFF + 15
10 * 12
R OFF ) t DEL1 ) 170
10 * 9 seconds
(3)
T SW + t ON ) t OFF
(4)
D MAX +
t ON
T SW
(5)
VREF (pin 4)
The controller ’s internal, 5-V bias rail is connected to this pin. The internal bias regulator requires a good quality
ceramic bypass capacitor (C VREF ) to GND (pin 6) for noise filtering and to provide compensation to the regulator
circuitry. The recommended C VREF value is 0.22- μ F. The minimum bypass capacitor value is 0.022- μ F limited
by stability considerations of the bias regulator, while the maximum is approximately 22- μ F. Also, capacitor
value on VDD should be minimum 10 times greater than that on VREF.
The VREF pin is internally current limited and can supply approximately 5-mA to external circuits. The 5-V bias
is only available when the undervoltage lock out (UVLO) circuit enables the operation of UCC289x controllers.
For the detailed functional description of the undervoltage lock out (UVLO) circuit refer to the Functional
Description section of this datasheet.
8
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