参数资料
型号: UCLAMP3311P.TCT
厂商: Semtech
文件页数: 4/7页
文件大小: 0K
描述: TVS ARRAY ESD/CDE PROT SLP1006P2
标准包装: 1
系列: uClamp™
电压 - 反向隔离(标准值): 3.3V
电压 - 击穿: 3.5V
功率(瓦特): 90W
电极标记: 双向
安装类型: 表面贴装
封装/外壳: 0402(1005 公制)
供应商设备封装: SLP1006P2
包装: 标准包装
产品目录页面: 1357 (CN2011-ZH PDF)
其它名称: UCLAMP3311PDKR
uClamp3311P
PROTECTION PRODUCTS
Applications Information
Device Connection Options
The μ Clamp3311P is designed to protect one data line
operating up to 3.3 volts. It will present a high
impedance to the protected line up to 3.3 volts. It will
“turn on” when the line voltage exceeds 3.5 volts. The
device is bidirectional and may be used on lines where
the signal polarity is above and below ground. These
devices are not recommended for use on dc power supply
lines due to their snap-back voltage characteristic.
EPD TVS Characteristics
These devices are constructed using Semtech’s
proprietary EPD technology. The structure of the EPD
TVS is vastly different from the traditional pn-junction
devices. At voltages below 5V, high leakage current
and junction capacitance render conventional ava-
lanche technology impractical for most applications.
However, by utilizing the EPD technology, these devices
can effectively operate at 3.3V while maintaining
excellent electrical characteristics.
The EPD TVS employs a complex nppn structure in
contrast to the pn structure normally found in tradi-
tional silicon-avalanche TVS diodes. The EPD mecha-
nism is achieved by engineering the center region of
Device Schematic & Pin Configuration
EPD TVS IV Characteristic Curve
I PP
I SB
the device such that the reverse biased junction does
not avalanche, but will “punch-through” to a conduct-
V F
I PT
I R
V RWM
V SB V PT V C
ing state. This structure results in a device with supe-
rior DC electrical parameters at low voltages while
maintaining the capability to absorb high transient
currents.
Circuit Board Layout Recommendations for Suppres-
sion of ESD.
Good circuit board layout is critical for the suppression
of ESD induced transients. The following guidelines are
recommended:
Place the TVS near the input terminals or connec-
tors to restrict transient coupling.
Minimize the path length between the TVS and the
protected line.
Minimize all conductive loops including power and
ground loops.
The ESD transient return path to ground should be
kept as short as possible.
Never run critical signals near board edges.
Use ground planes whenever possible.
I F
? 2007 Semtech Corp.
4
www.semtech.com
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