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| 型号： | UDA1380HN/N2,118 |
| 厂商： | NXP SEMICONDUCTORS |
| 元件分类： | 消费家电 |
| 英文描述： | Stereo audio coder-decoder for MD, CD and MP3; Package: SOT617-1 (HVQFN32); Container: Reel Pack, SMD, 13" |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC32 |
| 封装： | 5 X 5 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-617-1, HVQFN-32 |
| 文件页数： | 21/68页 |
| 文件大小： | 349K |
| 代理商： | UDA1380HN/N2,118 |
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2004
Apr
22
28
Philips
Semiconductors
Product
specication
Stereo
audio
coder-decoder
fo
r
M
D
,
CD
and
MP3
UD
A1380
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10.3
READ cycle
Table 14 shows the I2C-bus configuration for a READ cycle. The READ cycle is used to read the data values from the internal registers.
The format of the READ cycle is as follows:
1. The microcontroller begins by asserting a start condition (S).
2. The first byte (8 bits) contains the device address ‘00110A10’ and the R/W bit is set to logic 0 (WRITE).
3. The UDA1380 asserts an acknowledge (A).
4. The microcontroller writes the 8-bit address (ADDR) of the UDA1380 register from which the data will be read.
5. The UDA1380 acknowledges this register address (A).
6. The microcontroller generates a repeated start (Sr).
7. The microcontroller generates the device address ‘00110A10’ again, but this time the R/W bit is set to logic 1 (READ).
8. The UDA1380 asserts an acknowledge (A).
9. The UDA1380 sends two bytes of data with the Most Significant (MS) byte first, followed by the Least Significant (LS) byte; after each byte the
microcontroller asserts an acknowledge (A).
10. After each pair of bytes transmitted, the register address is auto-incremented; after each byte the microcontroller asserts an acknowledge (A).
11. The microcontroller stops this cycle by generating a negative acknowledge (NA).
12. The UDA1380 frees the I2C-bus allowing the microcontroller to generate a stop condition (P).
Table 14 Master transmitter reads from the UDA1380 registers in the I2C-bus mode
INITIAL BYTE
ACKNOWLEDGE FROM UDA1380
ACKNOWLEDGE FROM MICROCONTROLLER
DEVICE
ADDRESS
R/W
REGISTER
ADDRESS
R/W
MS data
byte
LS data
byte
S
00110A10
0
A
ADDR
A
Sr
00110A10
1
A
MS1
A
LS1
A
...
A
...
A
MSn
A
LSn
NA
P
auto increment if repeated n groups of 2 bytes are transmitted
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相关代理商/技术参数 |
参数描述 |
|---|---|
| UDA1380HN-T | 功能描述:接口—CODEC STEREO AUDIO CODER-DECODER RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| UDA1380TT | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| UDA1380TT/N2 | 制造商:PHILIP 功能描述: |
| UDA1380TT/N2,512 | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
| UDA1380TT/N2,518 | 功能描述:接口—CODEC SSA CODEC RoHS:否 制造商:Texas Instruments 类型: 分辨率: 转换速率:48 kSPs 接口类型:I2C ADC 数量:2 DAC 数量:4 工作电源电压:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:DSBGA-81 封装:Reel |
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