参数资料
型号: UPB1009K-A
厂商: CEL
文件页数: 14/28页
文件大小: 0K
描述: IC GPS RECEIVER LP 44-QFN
标准包装: 1
频率: 1575.42MHz
调制或协议: GPS
应用: GPS 接收器
电流 - 接收: 26mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
电源电压: 2.7 V ~ 3.3 V
工作温度: -40°C ~ 85°C
封装/外壳: 44-VFQFN
供应商设备封装: 44-QFN(8x8)
包装: 散装
UPB1009K
ELECTRICAL
CHARACTERISTICS (T A = +25 ° C, V C C = 3.0 V)
Parameter
Symbol
Test Conditions
MIN.
TYP.
MAX.
Unit
<PLL Synthesizer>
Circuit Current 4
Charge Pump Output Current
I CC4
I cpsink
PLL, VCO current, MS1 = L, MS2 = L
V 13 pin = V CC /2
8.0
? 0.55
9.5
? 0.45
10.6
? 0.35
mA
mA
Loop Filer Output (High Level)
Loop Filer Output (Low Level)
I cpsource
0.35
V CC ? 0.3
?
0.45
?
?
0.55
?
0.2
mA
V
V
Reference Input Level
V REFin
?
0.2
1.6
V PP
VCO Modulation Sensitivity
VCO Control Voltage
C/N
KV
VT
C/N
Center frequency
When PLL is Locked
Δ 10 kHz
?
0.5
70.0
100
1.3
81.0
?
2.0
?
MHz
V
dBc/Hz
<A/D Converter>
Circuit Current 5
Resolution
Sampling Clock
Input Band Width
I CC5
ResAD
fs
ADBW
3.1
?
?
5.1
4.1
4
?
?
5.4
?
20
?
mA
bits
MHz
MHz
Integral Non-linear Error
Signal-to-noise Ratio
Signal-to-noise + Distortion Ratio
Number
Total Harmonic Distortion Ratio
INL
SNR
SINAD
ENOB
THD
DC characteristics
IF = 5.17 MHz, fs = 20.48 MHz
IF = 5.17 MHz, fs = 20.48 MHz
ENOB = (SINAD ? 1.763)/6.02
IF = 5.17 MHz, fs = 20.48 MHz
?
22.0
20.0
3.0
?
0.2
25.3
25.1
3.9
? 40
1.0
?
?
?
? 30
LSB
dB
dB
bits
dBc
Second-degree to fifth-degree distortion
components
Remarks 1. Timing characteristics of ADC during normal operation
A buffer amplifier is internally inserted before the ADC core of the μ PB1009K. The bias of this buffer amplifier
is controlled by the signal input from the DC trim pin, and is used to eliminate the DC offset of the ADC.
Because the ladder resistor of the ADC is directly connected between V DD ana and GNDana, changes in
V DD ana affect the resolution of the ADC.
14
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