参数资料
型号: UPB1009K-E1-A
厂商: CEL
文件页数: 3/28页
文件大小: 0K
描述: IC GPS RECEIVER LP 44-QFN
标准包装: 1,500
频率: 1575.42MHz
调制或协议: GPS
应用: GPS 接收器
电流 - 接收: 26mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
电源电压: 2.7 V ~ 3.3 V
工作温度: -40°C ~ 85°C
封装/外壳: 44-VFQFN
供应商设备封装: 44-QFN(8x8)
包装: 带卷 (TR)
UPB1009K
PRODUCT
LINE-UP (T A = +25 ° C, V C C = 3.0 V)
Type
Part Number
Functions
V CC
I CC
CG
Package
Status
(Frequency unit: MHz)
(V)
(mA)
(dB)
Clock
μ PB1009K
Pre-amplifier + RF/IF down-
2.7 to 3.3
26.0
44-pin plastic QFN
New Device
Frequency
Specific
1 chip IC
converter + PLL synthesizer
REF = 16.368
1stIF = 61.380/2ndIF = 4.092
REF = 14.4, 16.384, 19.2, 26
1stIF = 62.980/2ndIF = 2.556
On-chip 4-bit ADC
μ PB1008K
LNA + Pre-amplifier + RF/IF
2.7 to 3.3
18.0
100 to
36-pin plastic QFN
down-converter + PLL
synthesizer
REF = 27.456
1stIF = 175.164/2ndIF = 0.132
On-chip 2-bit ADC
120
μ PB1007K
Pre-amplifier + RF/IF down-
2.7 to 3.3
25.0
100 to 120 36-pin plastic QFN
Available
converter + PLL synthesizer
REF = 16.368
1stIF = 61.380/2ndIF = 4.092
μ PB1005K
REF = 16.368
36-pin plastic QFN
1stIF = 61.380/2ndIF = 4.092
Remark Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail.
SYSTEM
APPLICATION
EXAMPLE
GPS receiver RF block diagram
PD1 and PD2 in the figure are Power Save Mode control pins.
MS1 and MS2 in the figure are TXCO (GPS, W-CDMA, PDC, GSM) control pins.
Caution This diagram schematically shows only the μ PB1009K ’s internal functions on the system.
This diagram does not present the actual application circuits.
3
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