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参数资料
| 型号： | UPD720101F1-EA8-A |
| 厂商： | Renesas Electronics America |
| 文件页数： | 15/38页 |
| 文件大小： | 0K |
| 描述： | HOST CTLR USB 2.0 144-FBGA |
| 标准包装： | 100 |
| 控制器类型： | USB 外设控制器 |
| 接口： | PCI |
| 电源电压： | 3 V ~ 3.6 V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 144-LFBGA |
| 供应商设备封装： | 144-FBGA（12x12） |
| 包装： | 托盘 |
| 其它名称： | 972-1002 |
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Data Sheet S16265EJ5V0DS
20
PD720101
Power consumption
Parameter
Symbol
Condition
Typ.
(30 MHz X’tal)
Typ.
(48 MHz OSC)
Unit
Power Consumption
PWD0-0
Device state = D0, All the ports does not connect to
any function, and each OHCI controller is under
UsbSuspend and EHCI controller is stopped.
Note1
31.4
10.4
mA
PWD0-2
The power consumption under the state without
suspend. Device state = D0, The number of active
ports is 2.
Note2
Full- or low-speed device(s) is (are) on the port.
High-speed device(s) is (are) on the port.
53.1
204.6
31.9
204.2
mA
PWD0-3
The power consumption under the state without
suspend. Device state = D0, The number of active
ports is 3.
Note2
Full- or low-speed device(s) is (are) on the port.
High-speed device(s) is (are) on the port.
55.3
253.8
34.2
255.5
mA
PWD0-4
The power consumption under the state without
suspend. Device state = D0, The number of active
ports is 4.
Note2
Full- or low-speed device(s) is (are) on the port.
High-speed device(s) is (are) on the port.
57.4
301.6
36.7
300.1
mA
PWD0-5
The power consumption under the state without
suspend. Device state = D0, The number of active
ports is 5.
Note2
Full- or low-speed device(s) is (are) on the port.
High-speed device(s) is (are) on the port.
59.8
349.1
38.8
345.2
mA
PWD0_C
The power consumption under suspend state during
PCI clock is stopped by CRUN0. Device state = D0.
30.5
10.4
mA
PWD1
Device state = D1, Analog PLL output is stopped.
Note 3
7.7
10.4
mA
PWD2
Device state = D2, Analog PLL output is stopped.
Note 3
7.7
10.4
mA
PWD3H
Device state = D3hot, VCCRST0 = High, Analog PLL
output is stopped.
Note 3
7.7
10.4
mA
PWD3C
Device state = D3cold, VCCRST0 = Low.
Note 4
0.03
3.81
mA
Notes 1. When any device is not connected to all the ports of HC, the power consumption for HC does not depend
on the number of active ports.
2. The number of active ports is set by the value of Port No Field in PCI configuration space EXT register.
3. This is the case when PCI bus state is B0.
4. This is the case when PCI bus state is B3.
Remark These are estimated value on Windows XP environment.
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