参数资料
型号: UPD720113GK-9EU-A
厂商: Renesas Electronics America
文件页数: 14/34页
文件大小: 0K
描述: IC HUB CTLR USB2.0 7-PORTS QFP
标准包装: 50
控制器类型: USB 2.0 集线器控制器
接口: USB 2.0
电源电压: 2.5 V,3.3 V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 80-TQFP
供应商设备封装: 80-TQFP
包装: 托盘
Data Sheet S16618EJ3V0DS
19
PD720113
USB Interface Block
(1/4)
Parameter
Symbol
Conditions
MIN.
MAX.
Unit
Low-speed Electrical Characteristics
Rise time (10% to 90%)
tLR
CL = 200 pF to 600 pF
75
300
ns
Fall time (90% to 10%)
tLF
CL = 200 pF to 600 pF
75
300
ns
Differential rise and fall time matching
tLRFM
(tLR/tLF) Note
80
125
%
Low-speed data rate
tLDRATHS
Average bit rate
1.49925
1.50075
Mbps
Downstream facing port source jitter total
(including frequency tolerance) (Figure
2-15):
To next transition
For paired transitions
tDDJ1
tDDJ2
25
14
+25
+14
ns
Downstream facing port differential
receiver jitter total (including frequency
tolerance) (Figure 2-17):
To next transition
For paired transitions
tUJR1
tUJR2
152
200
+152
+200
ns
Source SE0 interval of EOP (Figure 2-16)
tLEOPT
1.25
1.5
s
Receiver SE0 interval of EOP (Figure 2-16)
tLEOPR
670
ns
Width of SE0 interval during differential
transition
tLST
210
ns
Hub differential data delay (Figure 2-13)
tLHDD
300
ns
Hub differential driver jitter (including cable)
(Figure 2-13):
Downstream facing port
To next transition
For paired transitions
Upstream facing port
To next transition
For paired transitions
tLDHJ1
tLDHJ2
tLUHJ1
tLUHJ2
45
15
45
+45
+15
+45
ns
Data bit width distortion after SOP (Figure
2-13)
tLSOP
60
+60
ns
Hub EOP delay relative to tHDD (Figure
2-14)
tLEOPD
0
200
ns
Hub EOP output width skew (Figure 2-14)
tLHESK
300
+300
ns
Full-speed Electrical Characteristics
Rise time (10% to 90%)
tFR
CL = 50 pF,
RS = 36
4
20
ns
Fall time (90% to 10%)
tFF
CL = 50 pF,
RS = 36
4
20
ns
Differential rise and fall time matching
tFRFM
(tFR/tFF)
90
111.11
%
Full-speed data rate
tFDRATHS
Average bit rate
11.9940
12.0060
Mbps
Frame interval
tFRAME
0.9995
1.0005
ms
Note Excluding the first transition from the Idle state.
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