参数资料
型号: UPD780023AYCW(A)-XXX
元件分类: 微控制器/微处理器
英文描述: 8-BIT, MROM, 12 MHz, MICROCONTROLLER, PDIP64
封装: 0.750 INCH, PLASTIC, SDIP-64
文件页数: 27/92页
文件大小: 689K
代理商: UPD780023AYCW(A)-XXX
33
PD780021A(A), 780022A(A), 780023A(A), 780024A(A), 780021AY(A), 780022AY(A), 780023AY(A), 780024AY(A)
Data Sheet U15131EJ3V0DS
6. INTERRUPT FUNCTIONS
A total of 20 interrupt sources are provided, divided into the following three types.
Non-maskable: 1
Maskable:
18
Software:
1
Table 6-1. Interrupt Source List
Interrupt
Default
Interrupt Source
Internal/
Type
PriorityNote 1
Name
Trigger
External
Non-
INTWDT
Watchdog timer overflow
Internal
0004H
(A)
maskable
(with watchdog timer mode 1 selected)
Maskable
0
INTWDT
Watchdog timer overflow
(B)
(with interval timer mode selected)
1
INTP0
Pin input edge detection
External
0006H
(C)
2
INTP1
0008H
3
INTP2
000AH
4
INTP3
000CH
5
INTSER0
Serial interface UART0 reception error
Internal
000EH
(B)
generation
6
INTSR0
End of serial interface UART0 reception
0010H
7
INTST0
End of serial interface UART0 transmission
0012H
8
INTCSI30
End of serial interface SIO30 transfer
0014H
9
INTCSI31
End of serial interface SIO31 transfer
0016H
[Only for
PD780024A Subseries]
10
INTIIC0
End of serial interface IIC0 transfer
0018H
[Only for
PD780024AY Subseries]
11
INTWTI
Reference time interval signal from watch timer
001AH
12
INTTM00
Match between TM0 and CR00
001CH
(when CR00 is specified as compare register)
Detection of TI01 valid edge
(when CR00 is specified as capture register)
13
INTTM01
Match between TM0 and CR01
001EH
(when CR01 is specified as compare register)
Detection of TI00 valid edge
(when CR01 is specified as capture register)
14
INTTM50
Match between TM50 and CR50
0020H
15
INTTM51
Match between TM51 and CR51
0022H
16
INTAD0
End of A/D conversion
0024H
17
INTWT
Watch timer overflow
0026H
18
INTKR
Port 4 falling edge detection
External
0028H
(D)
Software
BRK
BRK instruction execution
003EH
(E)
Notes 1. The default priority is the priority when several maskable interrupt requests are generated at the same
time. 0 is the highest, and 18 is the lowest.
2. Basic configuration types (A) to (E) correspond to (A) to (E) in Figure 6-1.
Remark
The watchdog timer interrupt (INTWDT) can be selected from a non-maskable interrupt or a maskable
interrupt (internal).
Basic
Configuration
TypeNote 2
Vector
Table
Address
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