User’s Manual U17446EJ5V0UD
14
CHAPTER 1 OVERVIEW
1.1 Features
O 78K0S CPU core
O ROM and RAM capacities
Item
Part number
Program Memory (Flash Memory)
Memory (Internal High-Speed RAM)
μPD78F9232
4 KB
μPD78F9234
8 KB
256 bytes
O Minimum instruction execution time: 0.2
μs (with 10 MHz@4.0 to 5.5 V operation)
O Clock
High-speed system clock … Selected from the following three sources
- Ceramic/crystal resonator:
2 to 10 MHz (Standard product, (A) grade product)
2 to 8 MHz ((A2) grade product)
- External clock:
2 to 10 MHz (Standard product, (A) grade product)
2 to 8 MHz ((A2) grade product)
- High-speed internal oscillator:
8 MHz
±3% (10 to +80°C),
8 MHz
±5% (Standard product, (A) grade product: 40 to +85°C,
(A2) grade product:
40 to +125°C)
Low-speed internal oscillator 240 kHz (TYP.) … Watchdog timer, timer clock in intermittent operation
O I/O ports: 26 (CMOS I/O: 24, CMOS input: 1, CMOS output: 1)
O Timer: 4 channels
16-bit timer/event counter: 1 channel … Timer output × 1, capture input × 2
8-bit timer:
2 channels … PWM output
× 1
Watchdog timer:
1 channel … Operable with low-speed internal oscillation clock
O Serial interface: UART (LIN (Local Interconnect Network) bus supported) 1 channel
O On-chip multiplier: 8 bits
× 8 bits = 16 bits
O 10-bit resolution A/D converter: 4 channels
O On-chip power-on-clear (POC) circuit (A reset is automatically generated when the voltage drops to 2.1 V (TYP.)
or below.)
O On-chip low voltage detector (LVI) circuit (An interrupt/reset (selectable) is generated when the detection voltage
is reached.)
Detection voltage: Selectable from ten levels between 2.35 and 4.3 V
O Single-power-supply flash memory
Flash self programming enabled
Software protection function: Protected from outside party copying (no flash reading command)
Time required for writing by dedicated flash memory programmer: Approximately 3 seconds (4 KB)
Flash programming on mass production lines supported
O Safety function
Watchdog timer operated by clock independent from CPU
… A hang-up can be detected even if the system clock stops
Supply voltage drop detectable by LVI
… Appropriate processing can be executed before the supply voltage drops below the operation voltage
Equipped with option byte function
… Important system operation settings set in hardware