CHAPTER 19 FLASH MEMORY VERSION
User’s Manual U15400EJ4V0UD
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<RESET pin>
If the reset signal of the dedicated flash programmer is connected to the RESET pin connected to the reset signal
generator on-board, a signal conflict occurs. To prevent this, isolate the connection with the reset signal generator.
If the reset signal is input from the user system in the flash memory programming mode, a normal programming
operation cannot be performed. Therefore, do not input reset signals from other than the dedicated flash
programmer.
Figure 19-7. Signal Conflict (RESET Pin)
<Port pins>
When the
μPD78F9478 enters the flash memory programming mode, all the pins other than those that
communicate with flash programmer are in the same status as immediately after reset.
If the external device does not recognize initial statuses such as the output high impedance status, therefore,
connect the external device to VDD or VSS via a resistor.
<Resonator>
When using the on-board clock, connect X1, X2, XT1, and XT2 as required in the normal operation mode.
When using the clock output of the flash programmer, connect it directly to X1, disconnecting the main resonator
on-board, and leave the X2 pin open. The subsystem clock conforms to the normal operation mode.
<Power supply>
To use the power output from the flash programmer, connect the VDD pin to VDD of the flash programmer, and VSS
pin to GND of the flash programmer, respectively.
To use the on-board power supply, make connection in accordance with the normal operation mode. However,
because the voltage is monitored by the flash programmer, be sure to connect VDD of the flash programmer.
Supply the same power as in the normal operation mode to the other power pins (AVDD and AVSS).
<Other pins>
Process the other pins (S0 to S27, COM0 to COM3, VLC0 to VLC2, CAPH, and CAPL) in the same manner as in the
normal operation mode.
RESET
Connection pin of
dedicated flash
programmer
Reset signal generator
Signal conflict
Output pin
The signal output by the reset signal generator and the signal output from
the dedicated flash programmer conflict in the flash memory programming
mode, so isolate the signal of the reset signal generator.
PD78F9478,
PD78F9479
μ