参数资料
型号: UPD78P0308YGF-3BA-A
元件分类: 微控制器/微处理器
英文描述: 8-BIT, OTPROM, 5 MHz, MICROCONTROLLER, PQFP100
封装: 14 X 20 MM, LEAD FREE, PLASTIC, QFP-100
文件页数: 51/64页
文件大小: 2786K
代理商: UPD78P0308YGF-3BA-A
53
CHAPTER 3
PIN FUNCTION (
PD780308 SUBSERIES)
User’s Manual U11377EJ3V0UD
3.2.13 AVREF
This pin inputs the reference voltage for the on-chip A/D converter. This pin also functions to supply power to the
internal analog circuit. Supply power to this pin when using the A/D converter.
When not using the A/D converter, connect this pin to the VSS0 line.
3.2.14 AVSS
This is a ground potential pin of A/D converter. Always use the same voltage as that of the VSS0 pin even when
A/D converter is not used.
3.2.15 RESET
This is a low-level active system reset input pin.
3.2.16 X1 and X2
Crystal resonator connection pins for main system clock oscillation.
For external clock supply, input it to X1 and its inverted signal to X2.
3.2.17 XT1 and XT2
Crystal resonator connection pins for subsystem clock oscillation.
For external clock supply, input it to XT1 and its inverted signal to XT2.
3.2.18 VDD0, VDD1
VDD0 supplies positive power to the ports.
VDD1 supplies positive power to the circuits other than those of the ports.
3.2.19 VSS0, VSS1
VSS0 is the ground pin of the ports.
VSS1 is the ground pin of the circuits other than those of the ports.
3.2.20 VPP (
PD78P0308 only)
High-voltage apply pin for PROM programming mode setting and program write/verify.
Connect directly to VSS0 or VSS1 in normal operating mode.
3.2.21 IC (Mask ROM version only)
The IC (Internally Connected) pin is provided to set the test mode to check the
PD780308 Subseries at delivery.
Connect it directly to the VSS0 or VSS1 with the shortest possible wire in the normal operating mode.
When a voltage difference is produced between the IC pin and VSS0 or VSS1 pin because the wiring between those
two pins is too long or an external noise is input to the IC pin, the user’s program may not run normally.
G
G Connect IC pins to VSS0 or VSS1 pins directly.
VSS0, 1
IC
As short as possible
VSS0
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