参数资料
型号: V048T240T012
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, XMA60
封装: ROHS COMPLIANT, SMD-60
文件页数: 2/11页
文件大小: 691K
代理商: V048T240T012
vicorpower.com
800-735-6200
VI Chip Voltage Transformation Module
V048F240T012
Rev. 2.2
Page 10 of 11
VI Chip Voltage Transformation Module
Figure 18 — The PRM controls the factorized bus voltage, Vf, in proportion to output current to compensate for the output resistance, Ro, of the VTM. The VTM
output voltage is typically within 1% of the desired load voltage (VL) over all line and load conditions.
-In
PC
VC
TM
+In
-Out
+Out
VTM
+Out
-Out
K
Ro
+Out
–Out
+In
–In
VC
PC
TM
IL
VH
PR
NC
SG
SC
PRM-AL
OS
NC
CD
L
O
A
D
Factorized
Bus (Vf)
Vo = VL ± 1.0%
(IoRo)
K
Vf = V
L +
K
Vin
ROS
RCD
FPA Adaptive Loop
Figure 19 — An external error amplifier or Point-of-Load IC (POLIC) senses the load voltage and controls the PRM output – the Factorized Bus – as a function of
output current, compensating for the output resistance of the VTM and for distribution resistance.
+Out
–Out
+In
–In
VC
PC
TM
IL
VH
PR
NC
SG
SC
PRM-AL
OS
NC
CD
-In
PC
VC
TM
+In
-Out
+Out
VTM
+Out
-Out
K
Ro
Remote
Loop
Control
Vf = f (Vs)
L
O
A
D
Factorized
Power Bus
Vo = VL ± 0.4%
+S
–S
Vin
FPA Non-isolated Remote Loop
In figures below;
K = VTM transformation ratio
Vf = PRM output (Factorized Bus Voltage)
RO = VTM output resistance
VO = VTM output
VL = Desired load voltage
Application Note (continued)
LIN = 5 nH
+
+
VOUT
COUT
VIN
VI
K
+
+
CIN
IOUT
RCOUT
IQ
ROUT
RCIN
83 mA
VI Chip VTM Level 2 Transient Behavioral Model for 48 V to 24 V, 12.5 A
Figure 17 — This model characterizes the AC operation of the VI Chip VTM including response to output load or input voltage transients or steady state
modulations. The model enables estimates or simulations of input and output voltages under transient conditions, including response to a stepped load
with or without external filtering elements.
1/2 Iout
1/2 Vin
43.6 m
RCIN
1.3 m
3.44 nH
11.13 m
RCOUT
1m
7.7 F
LOUT = 1.1 nH
1.9 F
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