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参数资料
| 型号： | VDSP-SHARC-PC-FULL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 3/4页 |
| 文件大小： | 0K |
| 描述： | VISUALDSP++ FOR IDE TOOLS SHARC |
| 产品培训模块： | Introduction to VisualDSP++® Tools SHARC Processor Overview |
| 标准包装： | 1 |
| 系列： | SHARC® |
| 类型： | Visual DSP++? IDDE |
| 适用于相关产品： | SHARC? 处理器 |
| 其它名称： | Q5824280 VDSP-SHARC-PCFULL VDSP-SHARC-PCFULL-ND VDSPU-SHARC-PCFULL |
occasions where closer inspection in a simulated environment may be
required. VisualDSP++ provides core cycle-accurate simulators, allowing
inspection of every nuance of activity within the processor, including
visualization of the processor’s pipeline and cache. These simulators are
robust and highly accurate, so much so that they are used by Analog
Devices’ own silicon designers for validation. A second simulator is
available to Blackfin Processor users—a high speed functional simulator.
Using proprietary just-in-time (JIT) technology, the simulators have the
ability to simulate millions of cycles per second on the most modest of
host PCs. Effectively, this means that what used to be an overnight run is
now a 10-minute coffee break, and what was once
a coffee break is now a near-instantaneous simulation.
As many of the most performance-demanding applications process a
signal of some sort, comprehensive memory plotting is a cornerstone
of VisualDSP++ debugger support. VisualDSP++ provides multiple
views, from basic (line plots) to sophisticated (eye diagrams and
waterfalls) to pinpoint anomalous data sequences in your application.
Image viewing in a number of data formats is also available.
Users of the VDK get unparalleled visibility into the internals of
the kernel. Status on a per-thread basis is available, as is a compre-
hensive pictorial history of kernel events and CPU loading. Thread
changes, posted and pended semaphores, and other kernel events are
captured in this display.
For Blackfin Processors and SHARC Processors, inspection, or even
Kernel event history.
application stimulation, from the debugger at run time is possible
through the use of the processor’s background telemetry channel (BTC).
BTC allows for an arbitrary number of communication channels to be
established between the host debugger and the application. Channels
may go in either direction, so BTC can be used to read and write data as
the processor runs. Scalar values or entire arrays may be serviced by a
channel. Arrays read from the target can even be plotted in real time.
MP users get the same compelling set of debugging features across all
processors, unified into a single debugging interface. Individual windows
can be made to “float” their focus to whichever processor currently is
the debugger’s focus, or they can be “pinned” to a specific processor
so their contents do not follow the debugger’s focus. To further aid MP
debug, synchronous run, step, halt, and reset are also provided.
The Analog Devices patented statistical profiler offers unprecedented
and unique visibility into a running application. Operating completely
nonintrusively to the application, the application is polled thousands
of times per second and a statistical view of where an application is
spending the majority of its time is quickly assembled. This tool can be
used to easily inspect an application for unexpected hotspots (suggesting
the need to move a key routine from external to internal memory, for
example). Simulator targets provide a completely linear profiling view. For
Blackfin Processors, traditional instrumented profiling is also available.
Going even further, the VisualDSP++ compiler is able to act upon
profiling information. Profile-guided optimization (PGO) is a technique
that allows the compiler to instrument an application, run the application,
and then make a second pass compilation, exploiting the information
that was gathered during the run of the application. This gives the
compiler unique insight on a block-by-block basis, allowing it to optimize
with a level of granularity that is not possible with a tool that operates
only on a file-by-file basis.
Integrate into Your Existing Environment
A development tool suite is always a part of an organization’s larger
software engineering environment. VisualDSP++ has been designed to
operate in a larger environment.
Since an embedded engineer is often developing on a new platform
while maintaining existing products that were likely developed with
earlier versions of the tools, VisualDSP++ can be installed discretely
an arbitrary number of times at a variety of release levels, allowing
engineering to easily switch between current and legacy versions of
VisualDSP++.
To better integrate to source code control (SCC) systems, VisualDSP++
is able to connect to any SCC provider that supports the Microsoft ?
common source code control (MCSCC) interface. This interface is
supported by all leading SCC vendors. VisualDSP++ goes one step
further by supporting the control of VisualDSP++ itself within a source
code control system.
The ability to robustly test an embedded application is enabled through
a comprehensive automation application programmers interface (API).
Using Microsoft’s language-neutral automation technology, nearly every
feature of the graphical environment is available to script authors.
Applications can be rebuilt, downloaded, and run from a simple script
executed from the command line or from within a custom test harness
framework. The automation API is supported by C++ and VBScript
examples for all API calls, though any automation-aware language
can be used.
For prototype runs and/or small volume deployment, an Analog Devices
emulator can be used to flash a program onto your custom system.
Accessible through the Automation API, the flash programmer can be
scripted, making it possible to develop a turnkey user interface for use
by a production floor technician or other individual not familiar with
VisualDSP++. Device drivers are provided for all flash devices found on
EZ-KIT Lite products, and these drivers can be easily adjusted to support
an arbitrary flash device. The Stand-Alone Flash Programmer enables the
development engineer to script or automate this process with a license-
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相关代理商/技术参数 |
参数描述 |
|---|---|
| VDSP-TS-PCFLOAT | 功能描述:VISUAL DSP IDE TOOL TIGERSHARC RoHS:是 类别:编程器，开发系统 >> 软件 系列:TigerSHARC® 标准包装:1 系列:ISE® 设计套件 类型:订阅 适用于相关产品:Xilinx FPGAs 其它名称:Q4986209T1081384 |
| VDSP-TS-PCFLT-5 | 功能描述:SOFTWARE TGRSHARC PC FLOAT 5SEAT RoHS:否 类别:编程器，开发系统 >> 软件 系列:TigerSHARC® 标准包装:1 系列:ISE® 设计套件 类型:订阅 适用于相关产品:Xilinx FPGAs 其它名称:Q4986209T1081384 |
| VDSP-TS-PC-FULL | 功能描述:VISUAL DSP++ TOOL TIGERSHARC RoHS:否 类别:编程器，开发系统 >> 软件 系列:TigerSHARC® 标准包装:1 系列:ISE® 设计套件 类型:订阅 适用于相关产品:Xilinx FPGAs 其它名称:Q4986209T1081384 |
| VDSPU_SHARC_PCFULL | 制造商:Analog Devices 功能描述:EMULATOR ((NS)) |
| VDSPU-BLKFNPCFLOAT | 制造商:Analog Devices 功能描述:VISUALDSP++ - Virtual or Non-Physical Inventory (Software & Literature) |
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