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参数资料
| 型号： | VMS115 |
| 元件分类： | 加密电路 |
| 英文描述： | TELECOM, DATA ENCRYPTION CIRCUIT, PQFP100 |
| 封装： | MQFP-100 |
| 文件页数： | 22/64页 |
| 文件大小： | 572K |
| 代理商： | VMS115 |
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VLSI Technology, a subsidiary of Philips Semiconductors
8/10/99
29
Revision: 2.3
906
Data Sheet
Context Write Timing Diagram
5.3.4.5
Context Read
The context data read can be performed at any time without regard to the ORDY signal (see tim-
ing diagram). However, the ORDY signal is used at the end of a packet to signal that the HMAC
digest is ready to be read as part of the context. Therefore, the ORDY signal can be used to queue
a DMA transaction that will read the HMAC digest at the proper time. The context read pointer is
used to determine the value that is read from the context read table. The context read pointer is
incremented after every read of the context read table. A register access will not reset the context
read pointer.
Context Read Timing Diagram
5.3.4.6
Packet Data Write
The packet data is transferred into the VMS115 device with the packet data write command. The
IRDY signal must be high before starting the packet data write command (see timing diagram). If
Note: ‘other’ is any code other than context write (110) or register (X00) and context pointer will reset to zero
Note: context write will flush all state machines and reset ORDY and IRDY
123
4567
8
111
XX
CT0
111
XX
CT1
CT2
CT3
111
XX
CT4
910
other
A
11
12
13
14
15
111
XX
CT0
16
CLK
CE_L
CMD[2:0]
A
DQ
IRDY
ORDY
Note: ‘other’ is any code other than context read (010) or register (X00) and context pointer will reset to zero
12
3
45
6
7
8
011
XX
CT0
011
XX
CT1
CT2
CT3
011
XX
910
other
A
11
12
13
14
15
011
XX
CT4
CT0
16
= Driven by VMS115
CLK
CE_L
CMD[2:0]
A
DQ
IRDY
ORDY
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