
VLSI Technology, a subsidiary of Philips Semiconductors
8/10/99
16
Revision: 2.3
906
Data Sheet
Bit 4
DES Enable - Indicates that the data will be routed through the DES block.
0 - DES Disabled
1 - DES Enabled
Bit 3
SHA-1/MD5 - If bit 5 is set, this bit indicates the hash algorithm to be used.
0 - SHA-1
1 - MD5
Bit 2
CBC/ECB - If bit 4 is set, this bit indicates the DES mode in which to operate.
0 - Electronic Code Book
1 - Cipher Block Chaining
Bit 1
Encrypt/Decrypt - If bit 4 is set, this bit indicates whether the DES block should
perform an encrypt or decrypt operation.
0 - Decrypt
1 - Encrypt
Bit 0
DES/3DES - If bit 4 is set, this bit indicates a single or triple DES operation.
0 - Single DES
1 - Triple DES
Note: ‘101’ may be used to chain hash data larger than 216 bytes.
5.1.5
DMA Control Signals
5.1.5.1
VMS115 Rules for IRDY
The VMS115 will set the IRDY high whenever there are at least 8 word (32 bytes) locations avail-
able in the IPB. Otherwise IRDY will be low.
EXCEPT
The VMS115 will clear IRDY (low) when the last 8 or less words (32 bytes) of the packet have
started transfer to the VMS115. The IRDY line is set low when the host writes the first word into
the VMS115. The IRDY line will remain low until the context is READ from the VMS115.
5.1.5.2
Host Rules for IRDY
The host will sample IRDY prior to a DMA access to the VMS115. When IRDY is high, the host
will always write 8 words (32 bytes) of information unless it is the end of the packet. The host
will only write the remaining words (8 or less) at the end of a packet.
The host may break up the 8 words of data transfer into multiple DMA accesses to the VMS115.
However, the DMA should only check IRDY after the entire 8 words (32 bytes) have been trans-
ferred.
Hash Configuration Bits
Bit 8
Bit 7
Bit 5
Mode
x
1
x
HMAC Using Pre Compute
0
1
Hash Algorithm
1
0
1
Pre Compute IPAD and OPAD Keys for HMAC