参数资料
型号: VTERB-BLK-X2-U4
厂商: Lattice Semiconductor Corporation
文件页数: 28/34页
文件大小: 0K
描述: IP CORE VITERBI DECODER XP2
标准包装: 1
系列: *
其它名称: VTERBBLKX2U4
Lattice Semiconductor
IP Core Generation
3. IPexpress shows the current settings for the module or IP in the Source box. Make your new settings in the T ar-
get box.
4. If you want to generate a new set of files in a new location, set the new location in the IPX Target File box. The
base of the file name will be the base of all the new file names. The IPX Target File must end with an .ipx exten-
sion.
5. Click Regenerate. The module’s dialog box opens showing the current option settings.
6. In the dialog box, choose the desired options. To get information about the options, click Help . Also, check the
About tab in IPexpress for links to technical notes and user guides. IP may come with additional information. As
the options change, the schematic diagram of the module changes to show the I/O and the device resources
the module will need.
7. To import the module into your project, if it’s not already there, select Import IPX to Diamond Project (not
available in stand-alone mode).
8. Click Generate .
9. Check the Generate Log tab to check for warnings and error messages.
10.Click Close .
The IPexpress package file (.ipx) supported by Diamond holds references to all of the elements of the generated IP
core required to support simulation, synthesis and implementation. The IP core may be included in a user's design
by importing the .ipx file to the associated Diamond project. To change the option settings of a module or IP that is
already in a design project, double-click the module’s .ipx file in the File List view. This opens IPexpress and the
module’s dialog box showing the current option settings. Then go to step 6 above.
Regenerating an IP Core in ispLEVER
To regenerate an IP core in ispLEVER:
1. In the IPexpress tool, choose Tools > Regenerate IP/Module .
2. In the Select a Parameter File dialog box, choose the Lattice Parameter Configuration (.lpc) file of the IP core
you wish to regenerate, and click Open .
3. The Select Target Core Version, Design Entry, and Device dialog box shows the current settings for the IP core
in the Source Value box. Make your new settings in the Target Value box.
4. If you want to generate a new set of files in a new location, set the location in the LPC Target File box. The base
of the .lpc file name will be the base of all the new file names. The LPC Target File must end with an .lpc exten-
sion.
5. Click Next . The IP core’s dialog box opens showing the current option settings.
6. In the dialog box, choose desired options. To get information about the options, click Help . Also, check the
About tab in the IPexpress tool for links to technical notes and user guides. The IP core might come with addi-
tional information. As the options change, the schematic diagram of the IP core changes to show the I/O and
the device resources the IP core will need.
7. Click Generate .
8. Click the Generate Log tab to check for warnings and error messages.
IPUG32_02.7, June 2010
28
Block Viterbi Decoder User’s Guide
相关PDF资料
PDF描述
A3DDH-6418M IDC CABLE - AKR64H/AE64M/AKR64H
M3DFK-3406R IDC CABLE - MKR34K/MC34M/MCF34K
VTERB-BLK-SC-U4 IP CORE VITERBI DECODER SC/SCM
VTERB-BLK-PM-U4 IP CORE VITERBI DECODER ECPM
M3DGK-3406R IDC CABLE - MKR34K/MC34M/MCS34K
相关代理商/技术参数
参数描述
VTERB-BLK-X2-UT4 功能描述:开发软件 VITERBI DECODER RoHS:否 制造商:Atollic Inc. 产品:Compilers/Debuggers 用于:ARM7, ARM9, Cortex-A, Cortex-M, Cortex-R Processors
VTERB-BLK-XM-U4 功能描述:编码器、解码器、复用器和解复用器 Block Viterbi Decoder RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量(输入/输出):2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray
VTERB-DECO-O4-N1 功能描述:编码器、解码器、复用器和解复用器 Viterbi Decoder RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量(输入/输出):2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray
VTERB-DECO-XP-N1 功能描述:编码器、解码器、复用器和解复用器 Viterbi Decoder RoHS:否 制造商:Micrel 产品:Multiplexers 逻辑系列:CMOS 位数: 线路数量(输入/输出):2 / 12 传播延迟时间:350 ps, 400 ps 电源电压-最大:2.625 V, 3.6 V 电源电压-最小:2.375 V, 3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-44 封装:Tray
VTESALLANF-155.520000 功能描述:155.52MHz LVPECL VCXO Oscillator Surface Mount 3.3V 100mA Enable/Disable 制造商:taitien 系列:VT 包装:剪带 零件状态:新产品 类型:VCXO 频率:155.52MHz 功能:启用/禁用 输出:LVPECL 电压 - 电源:3.3V 频率稳定度:±50ppm 工作温度:-40°C ~ 85°C 电流 - 电源(最大值):100mA 等级:- 安装类型:表面贴装 大小/尺寸:0.276" 长 x 0.197" 宽(7.00mm x 5.00mm) 高度:0.075"(1.90mm) 封装/外壳:6-SMD,无引线(DFN,LCC) 电流 - 电源(禁用)(最大值):- 标准包装:200