参数资料
型号: W181-01G
英文描述: Miscellaneous Clock Generator
中文描述: 杂项时钟发生器
文件页数: 7/9页
文件大小: 160K
代理商: W181-01G
W181
7
Application Information
Recommended Circuit Configuration
For optimum performance in system applications the power
supply decoupling scheme shown in
Figure 4
should be used.
V
DD
decoupling is important to both reduce phase jitter and
EMI radiation. The 0.1-
μ
F decoupling capacitor should be
placed as close to the V
DD
pin as possible, otherwise the in-
creased trace inductance will negate its decoupling capability.
The 10-
μ
F decoupling capacitor shown should be a tantalum
type. For further EMI protection, the V
DD
connection can be
made via a ferrite bead, as shown.
Recommended Board Layout
Figure 5
shows a recommended 2-layer board layout.
Document #: 38-00790-A
Figure 4. Recommended Circuit Configuration
GND
W
8
7
6
5
1
2
3
4
C1
0.1 μF
FB
C2
10 μF Tantalum
3.3 or 5V System Supply
Clock
Output
Reference Input
NC
R1
Ordering Information
Ordering Code
W181
W181
Freq. Mask
Code
01, 02, 03
01
Package
Name
G
X
Package Type
8-pin Plastic SOIC (150-mil)
14-pin Plastic TSSOP
Figure 5. Recommended Board Layout (2-Layer Board)
Clock Output
High frequency supply decoupling
capacitor (0.1-μF recommended).
Common supply low frequency
decoupling capacitor (10-μF tantalum
recommended).
Match value to line impedance
FB
Ferrite Bead
C1 =
C2 =
R1 =
=
R1
C1
C2
G
G
FB
=
Via To GND Plane
G
Reference Input
NC
G
Power Supply Input
(3.3 or 5V)
相关PDF资料
PDF描述
W181-01X MISCELLANEOUS CLOCK GENERATOR|CMOS|TSSOP|14PIN|PLASTIC
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W181-03G Miscellaneous Clock Generator
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