- 您现在的位置：买卖IC网 > PDF目录245650 > W25Q64CVSSAG (WINBOND ELECTRONICS CORP) 64M X 1 SPI BUS SERIAL EEPROM, PDSO8 PDF资料下载
参数资料
| 型号： | W25Q64CVSSAG |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | PROM |
| 英文描述： | 64M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| 封装： | 0.208 INCH, GREEN, SOIC-8 |
| 文件页数： | 16/79页 |
| 文件大小： | 1086K |
| 代理商： | W25Q64CVSSAG |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页当前第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页
W25Q64CV
Publication Release Date: April 01, 2011
- 23 -
Revision C
(IO
0)
DO
(IO
1)
7.2.5
Write Enable (06h)
The Write Enable instruction (Figure 4) sets the Write Enable Latch (WEL) bit in the Status Register to a
1. The WEL bit must be set prior to every Page Program, Quad Page Program, Sector Erase, Block
Erase, Chip Erase, Write Status Register and Erase/Program Security Registers instruction. The Write
Enable instruction is entered by driving /CS low, shifting the instruction code “06h” into the Data Input (DI)
pin on the rising edge of CLK, and then driving /CS high.
/CS
CLK
DI
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Mode 0
Mode 3
Instruction (06h)
High Impedance
Figure 4. Write Enable Instruction Sequence Diagram
7.2.6 Write Enable for Volatile Status Register (50h)
The non-volatile Status Register bits described in section 7.1 can also be written to as volatile bits. This
gives more flexibility to change the system configuration and memory protection schemes quickly without
waiting for the typical non-volatile bit write cycles or affecting the endurance of the Status Register non-
volatile bits. To write the volatile values into the Status Register bits, the Write Enable for Volatile Status
Register (50h) instruction must be issued prior to a Write Status Register (01h) instruction. Write Enable
for Volatile Status Register instruction (Figure 5) will not set the Write Enable Latch (WEL) bit, it is only
valid for the Write Status Register instruction to change the volatile Status Register bit values.
/CS
CLK
DI
(IO
0)
DO
(IO
1)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Mode 0
Mode 3
Instruction (50h)
High Impedance
Figure 5. Write Enable for Volatile Status Register Instruction Sequence Diagram
相关PDF资料 |
PDF描述 |
|---|---|
| WS32K32-100HC | 128K X 8 MULTI DEVICE SRAM MODULE, 100 ns, CHIP66 |
| WS128K32-25G4CE | 512K X 8 MULTI DEVICE SRAM MODULE, 25 ns, CQFP68 |
| WMS128K8L-35DEQE | 128K X 8 STANDARD SRAM, 35 ns, CDSO32 |
| WMF512K8X-120CLQ5 | 512K X 8 FLASH 5V PROM, 120 ns, CQCC32 |
| WF4M16-150DTI5 | 4M X 16 FLASH 5V PROM MODULE, 150 ns, CDSO56 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| W25Q64CVSSAP | 制造商:WINBOND 制造商全称:Winbond 功能描述:3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q64CVSSIG | 功能描述:IC SPI FLASH 64MBIT 8-SOIC RoHS:是 类别:集成电路 (IC) >> 存储器 系列:SpiFlash® 标准包装:1,000 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:4K (512 x 8) 速度:400kHz 接口:I²C，2 线串口 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.173"，4.40mm 宽） 供应商设备封装:8-MFP 包装:带卷 (TR) |
| W25Q64CVSSIP | 制造商:WINBOND 制造商全称:Winbond 功能描述:3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q64CVTCAG | 制造商:WINBOND 制造商全称:Winbond 功能描述:3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q64CVTCAP | 制造商:WINBOND 制造商全称:Winbond 功能描述:3V 64M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
发布紧急采购，3分钟左右您将得到回复。