参数资料
型号: W25X32AVZPIG
厂商: WINBOND ELECTRONICS CORP
元件分类: PROM
英文描述: 4M X 8 FLASH 2.7V PROM, PDSO8
封装: 6 X 5 MM, GREEN, WSON-8
文件页数: 43/45页
文件大小: 1308K
代理商: W25X32AVZPIG
W25X32A
Publication Release Date: August 7, 2009
- 7 -
Preliminary - Revision B
7.1 Package Types
W25X32A is offered in an 8-pin plastic 208-mil width SOIC (package code SS), 6x5-mm WSON (package
code ZP), 16-pin plastic 300-mil width SOIC (package code SF) and Specal Order 8x6-mm (package
code ZE). See figures 1a-c. Package diagrams and dimensions are illustrated at the end of this
datasheet.
7.2 Chip Select (/CS)
The SPI Chip Select (/CS) pin enables and disables the device operation. When /CS is high the device is
deselected and the Serial Data Output (DO) pin is at high impedance. When deselected, the device’s
power consumption will be at standby levels unless an internal erase, program or status register cycle is
in progress. When /CS is brought low the device will be selected, power consumption will increase to
active levels and instructions can be written to and data read from the device. After power-up, /CS must
transition from high to low before a new instruction will be accepted. The /CS input must track the VCC
supply level at power-up (see “Write Protection” and figure 20). If needed a pull-up resister on /CS can be
used to accomplish this.
7.3 Serial Data Output (DO)
The SPI Serial Data Output (DO) pin provides a means for data and status to be serially read from
(shifted out of) the device. Data is shifted out on the falling edge of the Serial Clock (CLK) input pin.
7.4 Write Protect (/WP)
The Write Protect (/WP) pin can be used to prevent the Status Register from being written. Used in
conjunction with the Status Register’s Block Protect (BP2, BP1, and BP0) bits and Status Register
Protect (SRP) bits, a portion or the entire memory array can be hardware protected. The /WP pin is active
low.
7.5 HOLD (/HOLD)
The /HOLD pin allows the device to be paused while it is actively selected. When /HOLD is brought low,
while /CS is low, the DO pin will be at high impedance and signals on the DIO and CLK pins will be
ignored (don’t care). When /HOLD is brought high, device operation can resume. The /HOLD function can
be useful when multiple devices are sharing the same SPI signals. (“See Hold function”)
7.6 Serial Clock (CLK)
The SPI Serial Clock Input (CLK) pin provides the timing for serial input and output operations. ("See SPI
Operations")
7.7 Serial Data Input / Output (DIO)
The SPI Serial Data Input/Output (DIO) pin provides a means for instructions, addresses and data to be
serially written to (shifted into) the device. Data is latched on the rising edge of the Serial Clock (CLK)
input pin. The DIO pin is also used as an output pin when the Fast Read Dual Output instruction is
executed.
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